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<title>otp.git/erts/include/internal, branch OTP_R15B</title>
<subtitle>Mirror of Erlang/OTP repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://git.ninenines.eu/otp.git/'/>
<entry>
<title>Use critical sections as mutex implementation on Windows</title>
<updated>2011-11-13T19:40:59+00:00</updated>
<author>
<name>Rickard Green</name>
<email>rickard@erlang.org</email>
</author>
<published>2011-10-29T22:23:16+00:00</published>
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<id>15774d2ac5ba38dba287309f91eb7e4f58b9a636</id>
<content type='text'>
Windows native critical sections are now used internally in the
runtime system as mutex implementation. This since they perform
better under extreme contention than our own implementation.
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<pre>
Windows native critical sections are now used internally in the
runtime system as mutex implementation. This since they perform
better under extreme contention than our own implementation.
</pre>
</div>
</content>
</entry>
<entry>
<title>Improve ethread atomics</title>
<updated>2011-06-14T09:40:19+00:00</updated>
<author>
<name>Rickard Green</name>
<email>rickard@erlang.org</email>
</author>
<published>2011-01-02T09:03:54+00:00</published>
<link rel='alternate' type='text/html' href='http://git.ninenines.eu/otp.git/commit/?id=7f19af0423934f85c74ccb75546e5e3a6b6d10e8'/>
<id>7f19af0423934f85c74ccb75546e5e3a6b6d10e8</id>
<content type='text'>
The ethread atomics API now also provide double word size atomics.
Double word size atomics are implemented using native atomic
instructions on x86 (when the cmpxchg8b instruction is available)
and on x86_64 (when the cmpxchg16b instruction is available). On
other hardware where 32-bit atomics or word size atomics are
available, an optimized fallback is used; otherwise, a spinlock,
or a mutex based fallback is used.

The ethread library now performs runtime tests for presence of
hardware features, such as for example SSE2 instructions, instead
of requiring this to be determined at compile time.

There are now functions implementing each atomic operation with the
following implied memory barrier semantics: none, read, write,
acquire, release, and full. Some of the operation-barrier
combinations aren't especially useful. But instead of filtering
useful ones out, and potentially miss a useful one, we implement
them all.

A much smaller set of functionality for native atomics are required
to be implemented than before. More or less only cmpxchg and a
membar macro are required to be implemented for each atomic size.
Other functions will automatically be constructed from these. It is,
of course, often wise to implement more that this if possible from a
performance perspective.
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<pre>
The ethread atomics API now also provide double word size atomics.
Double word size atomics are implemented using native atomic
instructions on x86 (when the cmpxchg8b instruction is available)
and on x86_64 (when the cmpxchg16b instruction is available). On
other hardware where 32-bit atomics or word size atomics are
available, an optimized fallback is used; otherwise, a spinlock,
or a mutex based fallback is used.

The ethread library now performs runtime tests for presence of
hardware features, such as for example SSE2 instructions, instead
of requiring this to be determined at compile time.

There are now functions implementing each atomic operation with the
following implied memory barrier semantics: none, read, write,
acquire, release, and full. Some of the operation-barrier
combinations aren't especially useful. But instead of filtering
useful ones out, and potentially miss a useful one, we implement
them all.

A much smaller set of functionality for native atomics are required
to be implemented than before. More or less only cmpxchg and a
membar macro are required to be implemented for each atomic size.
Other functions will automatically be constructed from these. It is,
of course, often wise to implement more that this if possible from a
performance perspective.
</pre>
</div>
</content>
</entry>
<entry>
<title>Update copyright years</title>
<updated>2011-05-20T14:11:43+00:00</updated>
<author>
<name>Björn-Egil Dahlberg</name>
<email>psyeugenic@gmail.com</email>
</author>
<published>2011-05-20T14:11:43+00:00</published>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>Merge branch 'rickard/barriers/OTP-9281' into dev</title>
<updated>2011-05-13T12:27:41+00:00</updated>
<author>
<name>Rickard Green</name>
<email>rickard@erlang.org</email>
</author>
<published>2011-05-13T12:27:41+00:00</published>
<link rel='alternate' type='text/html' href='http://git.ninenines.eu/otp.git/commit/?id=0c73cf3d305c4b033c6e1efa6ebd08796a1d8682'/>
<id>0c73cf3d305c4b033c6e1efa6ebd08796a1d8682</id>
<content type='text'>
* rickard/barriers/OTP-9281:
  Silence warnings
  Fix build with hipe on amd64
  Reduce number of atomic ops
  Use 32-bit atomic for port snapshot
  Remove pointless erts_ports_alive variable
  Ensure quick break
  Ensure that all rehashing information are seen when done
  Ensure that stack updates are seen when stack is released
  Add needed barriers for write_concurrency tables
  Homogenize memory barriers on atomics
</content>
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<pre>
* rickard/barriers/OTP-9281:
  Silence warnings
  Fix build with hipe on amd64
  Reduce number of atomic ops
  Use 32-bit atomic for port snapshot
  Remove pointless erts_ports_alive variable
  Ensure quick break
  Ensure that all rehashing information are seen when done
  Ensure that stack updates are seen when stack is released
  Add needed barriers for write_concurrency tables
  Homogenize memory barriers on atomics
</pre>
</div>
</content>
</entry>
<entry>
<title>Homogenize memory barriers on atomics</title>
<updated>2011-05-11T10:11:45+00:00</updated>
<author>
<name>Rickard Green</name>
<email>rickard@erlang.org</email>
</author>
<published>2011-05-10T09:45:30+00:00</published>
<link rel='alternate' type='text/html' href='http://git.ninenines.eu/otp.git/commit/?id=5bcdb3ac4ea27ca47e18628aa147e7544043fa84'/>
<id>5bcdb3ac4ea27ca47e18628aa147e7544043fa84</id>
<content type='text'>
Atomic operations with specified barriers have specified barrier semantics.
Set and read operations have undefined barrier semantics. All other atomic
operations implied full memory barriers, except when using the libatomic_ops
library and the tilera atomics api.

Some code in the runtime system assumed that all operations used (except for
set, read and specified) implied full memory barriers. The use of the
libatomic_ops library and the tilera atomics api have therefore been modified
to behave as the other implementations.

Some atomic operations with specified barrier semantics on sparc32 have also
been been relaxed in this commit.
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Atomic operations with specified barriers have specified barrier semantics.
Set and read operations have undefined barrier semantics. All other atomic
operations implied full memory barriers, except when using the libatomic_ops
library and the tilera atomics api.

Some code in the runtime system assumed that all operations used (except for
set, read and specified) implied full memory barriers. The use of the
libatomic_ops library and the tilera atomics api have therefore been modified
to behave as the other implementations.

Some atomic operations with specified barrier semantics on sparc32 have also
been been relaxed in this commit.
</pre>
</div>
</content>
</entry>
<entry>
<title>erts_printf %R for relative ets-terms in halfword-vm</title>
<updated>2011-05-06T14:31:25+00:00</updated>
<author>
<name>Sverker Eriksson</name>
<email>sverker@erlang.org</email>
</author>
<published>2011-05-04T16:13:49+00:00</published>
<link rel='alternate' type='text/html' href='http://git.ninenines.eu/otp.git/commit/?id=913f72a8c9e1827c812c4795c76a0e57b5ac0eeb'/>
<id>913f72a8c9e1827c812c4795c76a0e57b5ac0eeb</id>
<content type='text'>
Conflicts:

	erts/emulator/beam/erl_printf_term.c
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<pre>
Conflicts:

	erts/emulator/beam/erl_printf_term.c
</pre>
</div>
</content>
</entry>
<entry>
<title>Update copyright years</title>
<updated>2011-03-11T16:34:22+00:00</updated>
<author>
<name>Björn-Egil Dahlberg</name>
<email>psyeugenic@gmail.com</email>
</author>
<published>2011-03-11T16:34:22+00:00</published>
<link rel='alternate' type='text/html' href='http://git.ninenines.eu/otp.git/commit/?id=d53be747c945d5e86997e1944446795b271dacb4'/>
<id>d53be747c945d5e86997e1944446795b271dacb4</id>
<content type='text'>
</content>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>The emulator could get into a state where it didn't check for I/O.</title>
<updated>2011-03-08T08:47:52+00:00</updated>
<author>
<name>Rickard Green</name>
<email>rickard@erlang.org</email>
</author>
<published>2011-03-07T16:04:02+00:00</published>
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<id>a37ee29884eaaf8b177cec19821159c938ddf6ff</id>
<content type='text'>
</content>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>Use 32-bit atomic for uaflgs in thread specific events</title>
<updated>2010-12-16T11:38:55+00:00</updated>
<author>
<name>Rickard Green</name>
<email>rickard@erlang.org</email>
</author>
<published>2010-12-11T07:35:33+00:00</published>
<link rel='alternate' type='text/html' href='http://git.ninenines.eu/otp.git/commit/?id=55251749b99ae51ce12c5dff2ac06ca5ceb02120'/>
<id>55251749b99ae51ce12c5dff2ac06ca5ceb02120</id>
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</content>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>Use 32-bit atomics for mutex and rwmutex flags</title>
<updated>2010-12-15T13:59:16+00:00</updated>
<author>
<name>Rickard Green</name>
<email>rickard@erlang.org</email>
</author>
<published>2010-12-10T22:36:55+00:00</published>
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<id>9fb5d07e28fa329e3144d8ae2b070c61b009b202</id>
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<pre>
</pre>
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</entry>
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