From b4592035dd987e3a615c1219a47988ed51e8e6e5 Mon Sep 17 00:00:00 2001 From: hygonsoc Date: Tue, 14 May 2019 16:43:55 +0800 Subject: add Hygon Dhyana support to enable cmpxchg and sse2 support. as Hygon Dhyana(Family 18h) share similar arch with AMD Family 17h --- erts/lib_src/common/ethr_aux.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/erts/lib_src/common/ethr_aux.c b/erts/lib_src/common/ethr_aux.c index 7b156fe01a..931469b386 100644 --- a/erts/lib_src/common/ethr_aux.c +++ b/erts/lib_src/common/ethr_aux.c @@ -109,7 +109,8 @@ x86_init(void) if (eax > 0 && (ETHR_IS_X86_VENDOR("GenuineIntel", ebx, ecx, edx) - || ETHR_IS_X86_VENDOR("AuthenticAMD", ebx, ecx, edx))) { + || ETHR_IS_X86_VENDOR("AuthenticAMD", ebx, ecx, edx) + || ETHR_IS_X86_VENDOR("HygonGenuine", ebx, ecx, edx))) { eax = 1; ethr_x86_cpuid__(&eax, &ebx, &ecx, &edx); } -- cgit v1.2.3