Merge branch 'rickard/dw-cmpxchg-clang/OTP-13336' into maint

* rickard/dw-cmpxchg-clang/OTP-13336:
  Improve cmpxchg8b/cmpxchg16b inline asm

2 files changed, 49 insertions, 32 deletions

diff --git a/erts/aclocal.m4 b/erts/aclocal.m4
index 3db6ff5b4c..ec9b66bf29 100644
--- a/erts/aclocal.m4
+++ b/erts/aclocal.m4
@@ -2157,8 +2157,8 @@ case "$GCC-$host_cpu" in
 	"lock; cmpxchg16b %0\n\t"
 #endif
 	"setz %3\n\t"
-	: "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=c"(xchgd)
-	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "3"(new[1]), "b"(new[0])
+	: "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=q"(xchgd)
+	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "c"(new[1]), "b"(new[0])
 	: "cc", "memory");
 	],
 	[plain_cmpxchg=yes])
@@ -2217,8 +2217,8 @@ case "$GCC-$host_cpu" in
 	"lock; cmpxchg8b %0\n\t"
 	"setz %3\n\t"
 	"popl %%ebx\n\t"
-	: "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=c"(xchgd)
-	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "3"(new[1]), "r"(new[0])
+	: "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=q"(xchgd)
+	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "c"(new[1]), "r"(new[0])
 	: "cc", "memory");
 	],
 	[gcc_pic_dw_cmpxchg_asm=yes
@@ -2238,14 +2238,14 @@ case "$GCC-$host_cpu" in
       char xchgd;
       long new[2], xchg[2], *p;
       __asm__ __volatile__(
-    	  "pushl %%ebx\n\t"
-	  "movl (%7), %%ebx\n\t"
-	  "movl 4(%7), %%ecx\n\t"
-	  "lock; cmpxchg8b %0\n\t"
-  	  "setz %3\n\t"
-	  "popl %%ebx\n\t"
-	  : "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=c"(xchgd)
-	  : "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "3"(new)
+	"pushl %%ebx\n\t"
+	"movl (%7), %%ebx\n\t"
+	"movl 4(%7), %%ecx\n\t"
+	"lock; cmpxchg8b %0\n\t"
+	"setz %3\n\t"
+	"popl %%ebx\n\t"
+	: "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=c"(xchgd)
+	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "r"(new)
 	: "cc", "memory");
 
 	],
diff --git a/erts/include/internal/i386/ethr_dw_atomic.h b/erts/include/internal/i386/ethr_dw_atomic.h
index 79de5d80da..5444a6345c 100644
--- a/erts/include/internal/i386/ethr_dw_atomic.h
+++ b/erts/include/internal/i386/ethr_dw_atomic.h
@@ -157,36 +157,53 @@ ethr_native_dw_atomic_cmpxchg_mb(ethr_native_dw_atomic_t *var,
 
     ETHR_DW_DBG_ALIGNED__(p);
 
+#if ETHR_NO_CLOBBER_EBX__ && ETHR_CMPXCHG8B_REGISTER_SHORTAGE
+    /*
+     * gcc wont let us use ebx as input and we
+     * get a register shortage
+     */
+
     __asm__ __volatile__(
-#if ETHR_NO_CLOBBER_EBX__
 	"pushl %%ebx\n\t"
-#  if ETHR_CMPXCHG8B_REGISTER_SHORTAGE
 	"movl (%7), %%ebx\n\t"
 	"movl 4(%7), %%ecx\n\t"
-#  else
-	"movl %8, %%ebx\n\t"
-#  endif
-#endif
-	"lock; cmpxchg" ETHR_DW_CMPXCHG_SFX__ " %0\n\t"
+	"lock; cmpxchg8b %0\n\t"
 	"setz %3\n\t"
-#if ETHR_NO_CLOBBER_EBX__
 	"popl %%ebx\n\t"
-#endif
 	: "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=c"(xchgd)
-	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]),
-#if ETHR_NO_CLOBBER_EBX__
-#  if ETHR_CMPXCHG8B_REGISTER_SHORTAGE
-	  "3"(new)
-#  else
-	  "3"(new[1]),
-	  "r"(new[0])
-#  endif
+	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "r"(new)
+	: "cc", "memory");
+
+#elif ETHR_NO_CLOBBER_EBX__
+    /*
+     * gcc wont let us use ebx as input
+     */
+
+    __asm__ __volatile__(
+	"pushl %%ebx\n\t"
+	"movl %8, %%ebx\n\t"
+	"lock; cmpxchg8b %0\n\t"
+	"setz %3\n\t"
+	"popl %%ebx\n\t"
+	: "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=q"(xchgd)
+	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "c"(new[1]), "r"(new[0])
+	: "cc", "memory");
+
 #else
-	  "3"(new[1]),
-	  "b"(new[0])
-#endif
+    /*
+     * gcc lets us place values in the registers where
+     * we want them
+     */
+
+    __asm__ __volatile__(
+	"lock; cmpxchg" ETHR_DW_CMPXCHG_SFX__ " %0\n\t"
+	"setz %3\n\t"
+	: "=m"(*p), "=d"(xchg[1]), "=a"(xchg[0]), "=q"(xchgd)
+	: "m"(*p), "1"(xchg[1]), "2"(xchg[0]), "c"(new[1]), "b"(new[0])
 	: "cc", "memory");
 
+#endif
+
     return (int) xchgd;
 }