erts: Activate staged code in a thread safe way

Activation of staged code is scheduled for a later moment when
all schedulers have done a full memory barrier. This allow
them to read active code index while executing without any
memory barriers at all.

1 files changed, 10 insertions, 0 deletions

diff --git a/erts/emulator/beam/erl_process.h b/erts/emulator/beam/erl_process.h
index c23810f15a..3f19d92fcd 100644
--- a/erts/emulator/beam/erl_process.h
+++ b/erts/emulator/beam/erl_process.h
@@ -264,6 +264,7 @@ typedef enum {
 #define ERTS_SSI_AUX_WORK_CHECK_CHILDREN	(((erts_aint32_t) 1) << 8)
 #define ERTS_SSI_AUX_WORK_SET_TMO		(((erts_aint32_t) 1) << 9)
 #define ERTS_SSI_AUX_WORK_MSEG_CACHE_CHECK	(((erts_aint32_t) 1) << 10)
+#define ERTS_SSI_AUX_WORK_CODE_IX_ACTIVATION	(((erts_aint32_t) 1) << 11)
 
 typedef struct ErtsSchedulerSleepInfo_ ErtsSchedulerSleepInfo;
 
@@ -429,6 +430,12 @@ typedef struct {
 	void *queue;
     } async_ready;
 #endif
+#ifdef ERTS_SMP
+    struct {
+	Process* code_stager;
+	ErtsThrPrgrVal thr_prgr;
+    } code_ix_activation;
+#endif
 } ErtsAuxWorkData;
 
 struct ErtsSchedulerData_ {
@@ -1110,6 +1117,9 @@ void erts_smp_notify_check_children_needed(void);
 #if ERTS_USE_ASYNC_READY_Q
 void erts_notify_check_async_ready_queue(void *);
 #endif
+#ifdef ERTS_SMP
+void erts_notify_code_ix_activation(Process* p, ErtsThrPrgrVal later);
+#endif
 void erts_schedule_misc_aux_work(int sched_id,
 				 void (*func)(void *),
 				 void *arg);