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author | Björn Gustavsson <[email protected]> | 2017-06-26 10:30:54 +0200 |
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committer | Björn Gustavsson <[email protected]> | 2017-06-26 10:50:33 +0200 |
commit | f405b07bc6136c76a016da67dc65e5c7ec9d8f9f (patch) | |
tree | cac72d10b734fc0712997e06959518be5291579b /erts/emulator/beam/erl_thr_queue.h | |
parent | bd2752e3d2ec91572e4d0c2fb35951f8f6bdc9f6 (diff) | |
download | otp-f405b07bc6136c76a016da67dc65e5c7ec9d8f9f.tar.gz otp-f405b07bc6136c76a016da67dc65e5c7ec9d8f9f.tar.bz2 otp-f405b07bc6136c76a016da67dc65e5c7ec9d8f9f.zip |
Eliminate potential unsafe use of general destination
a3407eaa2104d6 eliminated the -gen_dest flag for macros in ops.tab.
It turns out that the new implementation (taking the address of the
X or X destination register) is unsafe if the destination is a Y
register and there can be a GC. The problem is that the address to
the Y register will change if there is a GC.
Fortunately, the few instructions in OTP 20 that have a general
destinations are safe. The put_list_ssd instruction never does a GC.
The bit syntax instructions that may do a GC will always store the
result to an X register.
To be completely sure, rewrite the destination register from 'd' to
'x' for the bit syntax instructions. That means that a bit syntax
instruction with a Y register destionation will abort the loading
if it is encountered.
Diffstat (limited to 'erts/emulator/beam/erl_thr_queue.h')
0 files changed, 0 insertions, 0 deletions