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author | Mikael Pettersson <[email protected]> | 2015-03-27 13:13:00 +0100 |
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committer | Zandra Hird <[email protected]> | 2015-04-22 16:17:57 +0200 |
commit | 086af2a9f8fffefd8fb8330cc45bdf1e698809df (patch) | |
tree | 9fa57f8584fecfc1187eb91940046e0c09683234 /erts/emulator/hipe/hipe_arm_asm.m4 | |
parent | bf3b377220f2531b9b101f32222067beb3ea750b (diff) | |
download | otp-086af2a9f8fffefd8fb8330cc45bdf1e698809df.tar.gz otp-086af2a9f8fffefd8fb8330cc45bdf1e698809df.tar.bz2 otp-086af2a9f8fffefd8fb8330cc45bdf1e698809df.zip |
erts/hipe: unbreak arity 4 BIFs
This fixes arity 4 BIF support in HiPE, following its introduction
on master (OTP 18) via the nox/ets-update_counter-4 merge.
- define standard_bif_interface_4, nbif_4_gc_after_bif, and
nbif_4_simple_exception on ARM: unbreaks the build on ARM
- remove bogus stack re-alignment from standard_bif_interface_4
on AMD64: for 4-arg BIFs the stack is already aligned, and the
code would misalign the C stack which violates the ABI and may
cause alignment faults in vectorized code
- the nbif_4_simple_exception OPD name on PPC64 was incorrectly
using the nbif_3_simple_exception OPD name: this would have
caused a multiple definition error in the assembler or linker
In addition there are a few cleanups:
- fix standard_bif_interface_N comment on x86
- fix standard_bif_interface_4 comment on SPARC
- separate nbif_N_simple_exception blocks by empty lines on PPC,
like on ARM, to clearly show which things belong together
- fix standard_bif_interface_N comment on ARM
- fix standard_bif_interface_4 on AMD64 to match the indentation
and spacing conventions of the rest of that file
Diffstat (limited to 'erts/emulator/hipe/hipe_arm_asm.m4')
-rw-r--r-- | erts/emulator/hipe/hipe_arm_asm.m4 | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/erts/emulator/hipe/hipe_arm_asm.m4 b/erts/emulator/hipe/hipe_arm_asm.m4 index b2e3f83d1e..ca6aef2f8d 100644 --- a/erts/emulator/hipe/hipe_arm_asm.m4 +++ b/erts/emulator/hipe/hipe_arm_asm.m4 @@ -163,6 +163,10 @@ define(NBIF_ARG,`ifelse(eval($3 >= NR_ARG_REGS),0,`NBIF_REG_ARG($1,$3)',`NBIF_ST `/* #define NBIF_ARG_3_0 'NBIF_ARG(r1,3,0)` */' `/* #define NBIF_ARG_3_1 'NBIF_ARG(r2,3,1)` */' `/* #define NBIF_ARG_3_2 'NBIF_ARG(r3,3,2)` */' +`/* #define NBIF_ARG_4_0 'NBIF_ARG(r1,4,0)` */' +`/* #define NBIF_ARG_4_1 'NBIF_ARG(r2,4,1)` */' +`/* #define NBIF_ARG_4_2 'NBIF_ARG(r3,4,2)` */' +`/* #define NBIF_ARG_4_3 'NBIF_ARG(r4,4,3)` */' `/* #define NBIF_ARG_5_0 'NBIF_ARG(r1,5,0)` */' `/* #define NBIF_ARG_5_1 'NBIF_ARG(r2,5,1)` */' `/* #define NBIF_ARG_5_2 'NBIF_ARG(r3,5,2)` */' @@ -186,6 +190,7 @@ define(NBIF_RET,`NBIF_RET_N(eval(RET_POP($1)))')dnl `/* #define NBIF_RET_1 'NBIF_RET(1)` */' `/* #define NBIF_RET_2 'NBIF_RET(2)` */' `/* #define NBIF_RET_3 'NBIF_RET(3)` */' +`/* #define NBIF_RET_4 'NBIF_RET(4)` */' `/* #define NBIF_RET_5 'NBIF_RET(5)` */' dnl |