Eliminate the use of i_fetch for BIF instructions

3 files changed, 58 insertions, 59 deletions

diff --git a/erts/emulator/beam/beam_emu.c b/erts/emulator/beam/beam_emu.c
index b63fa038d2..d260c74255 100644
--- a/erts/emulator/beam/beam_emu.c
+++ b/erts/emulator/beam/beam_emu.c
@@ -2513,12 +2513,10 @@ do {						\
     {
 	typedef Eterm (*GcBifFunction)(Process*, Eterm*, Uint);
 	GcBifFunction bf;
-	Eterm arg;
 	Eterm result;
 	Uint live = (Uint) Arg(3);
 
-	GetArg1(2, arg);
-	reg[live] = arg;
+	GetArg1(2, x(live));
 	bf = (GcBifFunction) Arg(1);
 	c_p->fcalls = FCALLS;
 	SWAPOUT;
@@ -2538,12 +2536,12 @@ do {						\
 	    SET_I((BeamInstr *) Arg(0));
 	    Goto(*I);
 	}
-	reg[0] = arg;
+	x(0) = x(live);
 	I = handle_error(c_p, I, reg, translate_gc_bif((void *) bf));
 	goto post_error_handling;
     }
 
- OpCase(i_gc_bif2_jIId): /* Note, one less parameter than the i_gc_bif1
+ OpCase(i_gc_bif2_jIIssd): /* Note, one less parameter than the i_gc_bif1
 			    and i_gc_bif3 */
     {
 	typedef Eterm (*GcBifFunction)(Process*, Eterm*, Uint);
@@ -2551,8 +2549,13 @@ do {						\
 	Eterm result;
 	Uint live = (Uint) Arg(2);
 
-	reg[live++] = tmp_arg1;
-	reg[live] = tmp_arg2;
+	GetArg2(3, x(live), x(live+1));
+	/*
+	 * XXX This calling convention does not make sense. 'live'
+	 * should point out the first argument, not the second
+	 * (i.e. 'live' should not be incremented below).
+	 */
+	live++;
 	bf = (GcBifFunction) Arg(1);
 	c_p->fcalls = FCALLS;
 	SWAPOUT;
@@ -2566,30 +2569,34 @@ do {						\
 	ERTS_HOLE_CHECK(c_p);
 	FCALLS = c_p->fcalls;
 	if (is_value(result)) {
-	    StoreBifResult(3, result);
+	    StoreBifResult(5, result);
 	}
 	if (Arg(0) != 0) {
 	    SET_I((BeamInstr *) Arg(0));
 	    Goto(*I);
 	}
-	reg[0] = tmp_arg1;
-	reg[1] = tmp_arg2;
+	live--;
+	x(0) = x(live);
+	x(1) = x(live+1);
 	I = handle_error(c_p, I, reg, translate_gc_bif((void *) bf));
 	goto post_error_handling;
     }
 
- OpCase(i_gc_bif3_jIsId):
+ OpCase(i_gc_bif3_jIIssd):
     {
 	typedef Eterm (*GcBifFunction)(Process*, Eterm*, Uint);
 	GcBifFunction bf;
-	Eterm arg;
 	Eterm result;
-	Uint live = (Uint) Arg(3);
+	Uint live = (Uint) Arg(2);
 
-	GetArg1(2, arg);
-	reg[live++] = arg;
-	reg[live++] = tmp_arg1;
-	reg[live] = tmp_arg2;
+	x(live) = x(SCRATCH_X_REG);
+	GetArg2(3, x(live+1), x(live+2));
+	/*
+	 * XXX This calling convention does not make sense. 'live'
+	 * should point out the first argument, not the third
+	 * (i.e. 'live' should not be incremented below).
+	 */
+	live += 2;
 	bf = (GcBifFunction) Arg(1);
 	c_p->fcalls = FCALLS;
 	SWAPOUT;
@@ -2603,15 +2610,16 @@ do {						\
 	ERTS_HOLE_CHECK(c_p);
 	FCALLS = c_p->fcalls;
 	if (is_value(result)) {
-	    StoreBifResult(4, result);
+	    StoreBifResult(5, result);
 	}
 	if (Arg(0) != 0) {
 	    SET_I((BeamInstr *) Arg(0));
 	    Goto(*I);
 	}
-	reg[0] = arg;
-	reg[1] = tmp_arg1;
-	reg[2] = tmp_arg2;
+	live -= 2;
+	x(0) = x(live);
+	x(1) = x(live+1);
+	x(2) = x(live+2);
 	I = handle_error(c_p, I, reg, translate_gc_bif((void *) bf));
 	goto post_error_handling;
     }
@@ -2619,12 +2627,13 @@ do {						\
  /*
   * Guards bifs and, or, xor in guards.
   */
- OpCase(i_bif2_fbd):
+ OpCase(i_bif2_fbssd):
     {
-	Eterm tmp_reg[2] = {tmp_arg1, tmp_arg2};
+	Eterm tmp_reg[2];
 	Eterm (*bf)(Process*, Eterm*);
 	Eterm result;
 
+	GetArg2(2, tmp_reg[0], tmp_reg[1]);
 	bf = (BifFunction) Arg(1);
 	c_p->fcalls = FCALLS;
 	PROCESS_MAIN_CHK_LOCKS(c_p);
@@ -2636,7 +2645,7 @@ do {						\
 	ERTS_HOLE_CHECK(c_p);
 	FCALLS = c_p->fcalls;
 	if (is_value(result)) {
-	    StoreBifResult(2, result);
+	    StoreBifResult(4, result);
 	}
 	SET_I((BeamInstr *) Arg(0));
 	Goto(*I);
@@ -2645,12 +2654,13 @@ do {						\
  /*
   * Guards bifs and, or, xor, relational operators in body.
   */
- OpCase(i_bif2_body_bd):
+ OpCase(i_bif2_body_bssd):
     {
-	Eterm tmp_reg[2] = {tmp_arg1, tmp_arg2};
+	Eterm tmp_reg[2];
 	Eterm (*bf)(Process*, Eterm*);
 	Eterm result;
 
+	GetArg2(1, tmp_reg[0], tmp_reg[1]);
 	bf = (BifFunction) Arg(0);
 	PROCESS_MAIN_CHK_LOCKS(c_p);
 	ASSERT(!ERTS_PROC_IS_EXITING(c_p));
@@ -2661,10 +2671,10 @@ do {						\
 	ERTS_HOLE_CHECK(c_p);
 	if (is_value(result)) {
 	    ASSERT(!is_CP(result));
-	    StoreBifResult(1, result);
+	    StoreBifResult(3, result);
 	}
-	reg[0] = tmp_arg1;
-	reg[1] = tmp_arg2;
+	reg[0] = tmp_reg[0];
+	reg[1] = tmp_reg[1];
 	SWAPOUT;
 	I = handle_error(c_p, I, reg, bf);
 	goto post_error_handling;
diff --git a/erts/emulator/beam/beam_load.c b/erts/emulator/beam/beam_load.c
index 3671baa552..c90576333a 100644
--- a/erts/emulator/beam/beam_load.c
+++ b/erts/emulator/beam/beam_load.c
@@ -3921,9 +3921,7 @@ gen_make_fun2(LoaderState* stp, GenOpArg idx)
 /*
  * Rewrite gc_bifs with one parameter (the common case). Utilized
  * in ops.tab to rewrite instructions calling bif's in guards
- * to use a garbage collecting implementation. The instructions
- * are sometimes once again rewritten to handle literals (putting the
- * parameter in the mostly unused r[0] before the instruction is executed).
+ * to use a garbage collecting implementation.
  */
 static GenOp*
 gen_guard_bif1(LoaderState* stp, GenOpArg Fail, GenOpArg Live, GenOpArg Bif,
@@ -3978,10 +3976,6 @@ gen_guard_bif1(LoaderState* stp, GenOpArg Fail, GenOpArg Live, GenOpArg Bif,
 
 /*
  * This is used by the ops.tab rule that rewrites gc_bifs with two parameters.
- * The instruction returned is then again rewritten to an i_load instruction
- * followed by i_gc_bif2_jIId, to handle literals properly.
- * As opposed to the i_gc_bif1_jIsId, the instruction  i_gc_bif2_jIId is
- * always rewritten, regardless of if there actually are any literals.
  */
 static GenOp*
 gen_guard_bif2(LoaderState* stp, GenOpArg Fail, GenOpArg Live, GenOpArg Bif,
@@ -4008,23 +4002,19 @@ gen_guard_bif2(LoaderState* stp, GenOpArg Fail, GenOpArg Live, GenOpArg Bif,
 	op->a[2].val = stp->import[Bif.val].arity;
 	return op;
     }
-    op->op = genop_ii_gc_bif2_6;
+    op->op = genop_i_gc_bif2_6;
     op->arity = 6;
     op->a[0] = Fail;
     op->a[1].type = TAG_u;
-    op->a[2] = S1;
-    op->a[3] = S2;
-    op->a[4] = Live;
+    op->a[2] = Live;
+    op->a[3] = S1;
+    op->a[4] = S2;
     op->a[5] = Dst;
     return op;
 }
 
 /*
  * This is used by the ops.tab rule that rewrites gc_bifs with three parameters.
- * The instruction returned is then again rewritten to a move instruction that
- * uses r[0] for temp storage, followed by an i_load instruction,
- * followed by i_gc_bif3_jIsId, to handle literals properly. Rewriting
- * always occur, as with the gc_bif2 counterpart.
  */
 static GenOp*
 gen_guard_bif3(LoaderState* stp, GenOpArg Fail, GenOpArg Live, GenOpArg Bif,
@@ -4055,10 +4045,10 @@ gen_guard_bif3(LoaderState* stp, GenOpArg Fail, GenOpArg Live, GenOpArg Bif,
     op->arity = 7;
     op->a[0] = Fail;
     op->a[1].type = TAG_u;
-    op->a[2] = S1;
-    op->a[3] = S2;
-    op->a[4] = S3;
-    op->a[5] = Live;
+    op->a[2] = Live;
+    op->a[3] = S1;
+    op->a[4] = S2;
+    op->a[5] = S3;
     op->a[6] = Dst;
     op->next = NULL;
     return op;
diff --git a/erts/emulator/beam/ops.tab b/erts/emulator/beam/ops.tab
index 57fb1ea026..492d4d240a 100644
--- a/erts/emulator/beam/ops.tab
+++ b/erts/emulator/beam/ops.tab
@@ -995,8 +995,8 @@ bif2 Jump=j u$bif:erlang:element/2 S1=s S2=xy Dst=d => gen_element(Jump, S1, S2,
 
 bif1 p Bif S1 Dst => bif1_body Bif S1 Dst
 
-bif2 p Bif S1 S2 Dst => i_fetch S1 S2 | i_bif2_body Bif Dst
-bif2 Fail Bif S1 S2 Dst => i_fetch S1 S2 | i_bif2 Fail Bif Dst
+bif2 p Bif S1 S2 Dst => i_bif2_body Bif S1 S2 Dst
+bif2 Fail Bif S1 S2 Dst => i_bif2 Fail Bif S1 S2 Dst
 
 i_get s d
 
@@ -1018,8 +1018,8 @@ i_element j y s d
 
 bif1 f b s d
 bif1_body b s d
-i_bif2 f b d
-i_bif2_body b d
+i_bif2 f b s s d
+i_bif2_body b s s d
 
 #
 # Internal calls.
@@ -1568,17 +1568,16 @@ gc_bif3 Fail I Bif S1 S2 S3 Dst => \
 
 i_gc_bif1 j I s I d
 
-ii_gc_bif2/6
-
-ii_gc_bif2 Fail Bif S1 S2 Live D => i_fetch S1 S2 | i_gc_bif2 Fail Bif Live D
-
-i_gc_bif2 j I I d
+i_gc_bif2 j I I s s d
 
 ii_gc_bif3/7
 
-ii_gc_bif3 Fail Bif S1 S2 S3 Live D => move S1 x | i_fetch S2 S3 | i_gc_bif3 Fail Bif x Live D
+# A specific instruction can only have 6 operands, so we must
+# pass one of the arguments in an x register.
+ii_gc_bif3 Fail Bif Live S1 S2 S3 Dst => \
+  move S1 x | i_gc_bif3 Fail Bif Live S2 S3 Dst
 
-i_gc_bif3 j I s I d
+i_gc_bif3 j I I s s d
 
 #
 # The following instruction is specially handled in beam_load.c