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author | Rickard Green <[email protected]> | 2016-02-22 19:20:23 +0100 |
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committer | Rickard Green <[email protected]> | 2016-02-22 19:20:23 +0100 |
commit | d14f2d178d8abcaebd5b14e25ca8ac9a71775271 (patch) | |
tree | c7ac393d108c3564a9b3c06b66eb6f0f131d12c7 /erts/include/internal | |
parent | 5c1d88266274d40a8702a8f66c8cbd4e0f0c15f3 (diff) | |
parent | 661aeed3ef57de87330123adf6100e179fd7dad0 (diff) | |
download | otp-d14f2d178d8abcaebd5b14e25ca8ac9a71775271.tar.gz otp-d14f2d178d8abcaebd5b14e25ca8ac9a71775271.tar.bz2 otp-d14f2d178d8abcaebd5b14e25ca8ac9a71775271.zip |
Merge branch 'rickard/gcc5-pic-cmpxchg8b/OTP-13326' into maint
* rickard/gcc5-pic-cmpxchg8b/OTP-13326:
Improve cmpxchg8b inline asm configure test
Diffstat (limited to 'erts/include/internal')
-rw-r--r-- | erts/include/internal/ethread_header_config.h.in | 4 | ||||
-rw-r--r-- | erts/include/internal/i386/ethr_dw_atomic.h | 16 |
2 files changed, 15 insertions, 5 deletions
diff --git a/erts/include/internal/ethread_header_config.h.in b/erts/include/internal/ethread_header_config.h.in index 9cabd0591a..f4b08cfced 100644 --- a/erts/include/internal/ethread_header_config.h.in +++ b/erts/include/internal/ethread_header_config.h.in @@ -166,6 +166,10 @@ /* Define if you use a gcc that supports the double word cmpxchg instruction */ #undef ETHR_GCC_HAVE_DW_CMPXCHG_ASM_SUPPORT +/* Define if gcc wont let you clobber ebx with cmpxchg8b and position + independent code */ +#undef ETHR_CMPXCHG8B_PIC_NO_CLOBBER_EBX + /* Define if you get a register shortage with cmpxchg8b and position independent code */ #undef ETHR_CMPXCHG8B_REGISTER_SHORTAGE diff --git a/erts/include/internal/i386/ethr_dw_atomic.h b/erts/include/internal/i386/ethr_dw_atomic.h index e8c4119ef0..79de5d80da 100644 --- a/erts/include/internal/i386/ethr_dw_atomic.h +++ b/erts/include/internal/i386/ethr_dw_atomic.h @@ -115,13 +115,19 @@ ethr_native_dw_atomic_addr(ethr_native_dw_atomic_t *var) return (ethr_sint_t *) ETHR_DW_NATMC_MEM__(var); } -#if ETHR_SIZEOF_PTR == 4 && defined(__PIC__) && __PIC__ +#if defined(ETHR_CMPXCHG8B_PIC_NO_CLOBBER_EBX) && defined(__PIC__) && __PIC__ +#if ETHR_SIZEOF_PTR != 4 +# error unexpected pic issue +#endif /* * When position independent code is used in 32-bit mode, the EBX register - * is used for storage of global offset table address, and we may not - * use it as input or output in an asm. We need to save and restore the - * EBX register explicitly (for some reason gcc doesn't provide this - * service to us). + * is used for storage of global offset table address. When compiling with + * an old gcc (< vsn 5) we may not use it as input or output in an inline + * asm. We then need to save and restore the EBX register explicitly (for + * some reason old gcc compilers didn't provide this service to us). + * ETHR_CMPXCHG8B_PIC_NO_CLOBBER_EBX will be defined if we need to + * explicitly manage EBX ourselves. + * */ # define ETHR_NO_CLOBBER_EBX__ 1 #else |