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authorLukas Larsson <[email protected]>2015-07-16 15:36:44 +0200
committerLukas Larsson <[email protected]>2016-02-02 10:45:22 +0100
commit6090f9c7e9b0ddbccef357641c1455475b348e94 (patch)
tree05651df115da49195739fa11009bc9c225f85ce8 /erts/lib_src/common
parent0399f5fc547ef035c4eb5e383f30b28ae73d936e (diff)
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erts: Add power saving cpu feature tests and use them
Diffstat (limited to 'erts/lib_src/common')
-rw-r--r--erts/lib_src/common/ethr_aux.c29
1 files changed, 23 insertions, 6 deletions
diff --git a/erts/lib_src/common/ethr_aux.c b/erts/lib_src/common/ethr_aux.c
index fbd870c2b5..3e7aad16c7 100644
--- a/erts/lib_src/common/ethr_aux.c
+++ b/erts/lib_src/common/ethr_aux.c
@@ -144,16 +144,33 @@ x86_init(void)
eax = 0x80000000;
ethr_x86_cpuid__(&eax, &ebx, &ecx, &edx);
- if (eax >= 0x80000001) {
- /* Get the extended feature set */
- eax = 0x80000001;
+ if (eax < 0x80000001)
+ return;
+
+ if (eax >= 0x80000007) {
+ /* Advanced Power Management Information */
+ eax = 0x80000007;
ethr_x86_cpuid__(&eax, &ebx, &ecx, &edx);
- } else {
- eax = ebx = ecx = edx = 0;
+
+ /* I got the values below from:
+ http://lxr.free-electrons.com/source/arch/x86/include/asm/cpufeature.h
+ They can be gotten from the intel/amd manual as well.
+ */
+
+ ethr_runtime__.conf.have_constant_tsc = (edx & (1 << 8));
+ ethr_runtime__.conf.have_tsc_reliable = (edx & (1 << 23));
+ ethr_runtime__.conf.have_nonstop_tsc = (edx & (1 << 24));
+ ethr_runtime__.conf.have_nonstop_tsc_s3 = (edx & (1 << 30));
+
}
-
+
+ /* Extended Processor Info and Feature Bits */
+ eax = 0x80000001;
+ ethr_x86_cpuid__(&eax, &ebx, &ecx, &edx);
+
/* bit 27 of edx is set if we have rdtscp */
ethr_runtime__.conf.have_rdtscp = (edx & (1 << 27));
+
}
#endif /* ETHR_X86_RUNTIME_CONF__ */