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author | Björn-Egil Dahlberg <[email protected]> | 2013-09-17 16:48:13 +0200 |
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committer | Björn-Egil Dahlberg <[email protected]> | 2014-01-28 15:56:25 +0100 |
commit | fa49c8ecac4996b47b17f9025240e202eb273389 (patch) | |
tree | 19905a2f2865a001b4156dbf94e837ab6a0d4560 /lib/compiler | |
parent | 64ee859fc4c17259ab95192abf7493fed8f2b0ac (diff) | |
download | otp-fa49c8ecac4996b47b17f9025240e202eb273389.tar.gz otp-fa49c8ecac4996b47b17f9025240e202eb273389.tar.bz2 otp-fa49c8ecac4996b47b17f9025240e202eb273389.zip |
compiler: Fix stack register reordering
Can now handle {list [reg()]} elements in instructions.
Diffstat (limited to 'lib/compiler')
-rw-r--r-- | lib/compiler/src/v3_codegen.erl | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/lib/compiler/src/v3_codegen.erl b/lib/compiler/src/v3_codegen.erl index eff43b584a..bd5ced39e5 100644 --- a/lib/compiler/src/v3_codegen.erl +++ b/lib/compiler/src/v3_codegen.erl @@ -596,14 +596,13 @@ top_level_block(Keis, Bef, MaxRegs, _St) -> %% number to the outer catch, which is wrong. turn_yregs(0, Tp, _) -> Tp; -turn_yregs(El, Tp, MaxY) when element(1, element(El, Tp)) =:= yy -> - turn_yregs(El-1, setelement(El, Tp, {y,MaxY-element(2, element(El, Tp))}), MaxY); -turn_yregs(El, Tp, MaxY) when is_list(element(El, Tp)) -> - New = map(fun ({yy,YY}) -> {y,MaxY-YY}; - (Other) -> Other end, element(El, Tp)), - turn_yregs(El-1, setelement(El, Tp, New), MaxY); turn_yregs(El, Tp, MaxY) -> - turn_yregs(El-1, Tp, MaxY). + turn_yregs(El-1,setelement(El,Tp,turn_yreg(element(El,Tp),MaxY)),MaxY). + +turn_yreg({yy,YY},MaxY) -> {y,MaxY-YY}; +turn_yreg({list,Ls},MaxY) -> {list, turn_yreg(Ls,MaxY)}; +turn_yreg(Ts,MaxY) when is_list(Ts) -> [turn_yreg(T,MaxY)||T<-Ts]; +turn_yreg(Other,_MaxY) -> Other. %% select_cg(Sclause, V, TypeFail, ValueFail, StackReg, State) -> %% {Is,StackReg,State}. |