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authorMagnus Lång <[email protected]>2016-03-12 01:36:36 +0100
committerMagnus Lång <[email protected]>2016-08-30 17:02:40 +0200
commitf8086b825904eb842f44671ce773197d6ba03879 (patch)
tree6fa6093811b63d5425d862d373238b0e399bfa19 /lib/hipe/main/hipe.erl
parentcd8b3708db582a7735bb357c0783d8ebdb3b6b2e (diff)
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hipe: Add o0 and o1 to tests
Now that x86 is no longer broken with these optimisation levels, we add them to the test suite to ensure they do not break again. Bump timeout to 6min since tests are run twice as many times. The option set of o1 was changed to all optimisations that run fast on both big and small programs, incurring only a slight compile time increase compared to the old set, but with a, presumably, significant improvement to speed of compiled code. Change o0 register allocator to linear_scan.
Diffstat (limited to 'lib/hipe/main/hipe.erl')
-rw-r--r--lib/hipe/main/hipe.erl18
1 files changed, 11 insertions, 7 deletions
diff --git a/lib/hipe/main/hipe.erl b/lib/hipe/main/hipe.erl
index 6c525dd143..8d9f893bec 100644
--- a/lib/hipe/main/hipe.erl
+++ b/lib/hipe/main/hipe.erl
@@ -1382,8 +1382,15 @@ opt_keys() ->
%% Definitions:
+o0_opts(_TargetArch) ->
+ [concurrent_comp, {regalloc,linear_scan}].
+
o1_opts(TargetArch) ->
- Common = [inline_fp, pmatch, peephole],
+ Common = [inline_fp, pmatch, peephole,
+ icode_ssa_const_prop, icode_ssa_copy_prop, icode_inline_bifs,
+ rtl_ssa, rtl_ssa_const_prop, rtl_ssapre,
+ spillmin_color, use_indexing, remove_comments,
+ binary_opt, {regalloc,coalescing} | o0_opts(TargetArch)],
case TargetArch of
ultrasparc ->
Common;
@@ -1402,11 +1409,8 @@ o1_opts(TargetArch) ->
end.
o2_opts(TargetArch) ->
- Common = [icode_ssa_const_prop, icode_ssa_copy_prop, % icode_ssa_struct_reuse,
- icode_type, icode_inline_bifs, icode_call_elim, rtl_lcm,
- rtl_ssa, rtl_ssa_const_prop,
- spillmin_color, use_indexing, remove_comments,
- concurrent_comp, binary_opt | o1_opts(TargetArch)],
+ Common = [icode_type, icode_call_elim, % icode_ssa_struct_reuse,
+ rtl_lcm | (o1_opts(TargetArch) -- [rtl_ssapre])],
case TargetArch of
T when T =:= amd64 orelse T =:= ppc64 -> % 64-bit targets
[icode_range | Common];
@@ -1416,7 +1420,7 @@ o2_opts(TargetArch) ->
o3_opts(TargetArch) ->
%% no point checking for target architecture since this is checked in 'o1'
- [icode_range, {regalloc,coalescing} | o2_opts(TargetArch)].
+ [icode_range | o2_opts(TargetArch)].
%% Note that in general, the normal form for options should be positive.
%% This is a good programming convention, so that tests in the code say