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author | Sverker Eriksson <[email protected]> | 2016-09-02 14:51:25 +0200 |
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committer | Sverker Eriksson <[email protected]> | 2016-09-02 14:51:25 +0200 |
commit | c2f8b61ca3682281752fa0984699214dfcbf7ccd (patch) | |
tree | 3f44fa5c58d0d0d845045c3c5535aefad333b6dd /lib/hipe/opt/hipe_spillmin.erl | |
parent | 87643cf92c061d7518299fdebb326e315c32e528 (diff) | |
parent | a19e3f0e1e82b793d58f9ef0db907ba637793fb6 (diff) | |
download | otp-c2f8b61ca3682281752fa0984699214dfcbf7ccd.tar.gz otp-c2f8b61ca3682281752fa0984699214dfcbf7ccd.tar.bz2 otp-c2f8b61ca3682281752fa0984699214dfcbf7ccd.zip |
Merge branch 'sverker/hipe-performance-o1/PR-1154/OTP-13862'
* sverker/hipe-performance-o1/PR-1154:
hipe_sparc: Minimise CFG<->linear conversions
hipe_ppc: Minimise CFG<->linear conversions
hipe_arm: Minimise CFG<->linear conversions
hipe_x86: Use lea instead of move+add
hipe_arm: Improve peephole optimiser
hipe_arm: Be resilient to crappy RTL
hipe_ppc: Be resilient to crappy RTL
hipe_sparc: Be resilient to crappy RTL
hipe: Reuse liveness info for spillmin
hipe_x86: Minimise CFG<->linear conversions
hipe: Fix o0 and o1
hipe: Add o0 and o1 to tests
hipe_rtl_binary:get_word_integer/4: Handle imms
hipe_x86: Be resilient to crappy RTL
hipe_x86: LSRA for SSE2
Diffstat (limited to 'lib/hipe/opt/hipe_spillmin.erl')
-rw-r--r-- | lib/hipe/opt/hipe_spillmin.erl | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/lib/hipe/opt/hipe_spillmin.erl b/lib/hipe/opt/hipe_spillmin.erl index 4eeb1d71db..6bb6980ad5 100644 --- a/lib/hipe/opt/hipe_spillmin.erl +++ b/lib/hipe/opt/hipe_spillmin.erl @@ -49,7 +49,7 @@ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -module(hipe_spillmin). --export([stackalloc/6, mapmerge/2]). +-export([stackalloc/6, stackalloc/7, mapmerge/2]). %%-define(DEBUG, 1). -define(HIPE_INSTRUMENT_COMPILER, true). @@ -69,16 +69,24 @@ -spec stackalloc(#cfg{}, [_], non_neg_integer(), comp_options(), module(), hipe_temp_map()) -> - {hipe_spill_map(), non_neg_integer()}. + {hipe_spill_map(), non_neg_integer()}. stackalloc(CFG, StackSlots, SpillIndex, Options, Target, TempMap) -> + Liveness = Target:analyze(CFG), + stackalloc(CFG, Liveness, StackSlots, SpillIndex, Options, Target, TempMap). + +-spec stackalloc(#cfg{}, _, [_], non_neg_integer(), + comp_options(), module(), hipe_temp_map()) -> + {hipe_spill_map(), non_neg_integer()}. + +stackalloc(CFG, Liveness, StackSlots, SpillIndex, Options, Target, TempMap) -> case proplists:get_bool(spillmin_color, Options) of false -> - ?option_time(hipe_spillmin_scan:stackalloc(CFG, StackSlots, SpillIndex, + ?option_time(hipe_spillmin_scan:stackalloc(CFG, Liveness, StackSlots, SpillIndex, Options, Target, TempMap), "Spill minimize, linear scan", Options); true -> - ?option_time(hipe_spillmin_color:stackalloc(CFG, StackSlots, SpillIndex, + ?option_time(hipe_spillmin_color:stackalloc(CFG, Liveness, StackSlots, SpillIndex, Options, Target, TempMap), "Spill minimize, graph coloring", Options) end. |