hipe: Refactor ra callbacks to accept context arg

This allows us to pass around the context data that
hipe_regalloc_prepass needs cleanly, without using process dictionary or
parameterised modules (like it was previous to this change).

1 files changed, 63 insertions, 63 deletions

diff --git a/lib/hipe/regalloc/hipe_ppc_specific.erl b/lib/hipe/regalloc/hipe_ppc_specific.erl
index d046567e79..ed7a26de8c 100644
--- a/lib/hipe/regalloc/hipe_ppc_specific.erl
+++ b/lib/hipe/regalloc/hipe_ppc_specific.erl
@@ -22,123 +22,123 @@
 -module(hipe_ppc_specific).
 
 %% for hipe_coalescing_regalloc:
--export([number_of_temporaries/1
-	 ,analyze/1
-	 ,labels/1
-	 ,all_precoloured/0
-	 ,bb/2
-	 ,liveout/2
-	 ,reg_nr/1
-	 ,def_use/1
-	 ,is_move/1
-	 ,is_precoloured/1
-	 ,var_range/1
-	 ,allocatable/0
-	 ,non_alloc/1
-	 ,physical_name/1
-	 ,reverse_postorder/1
-	 ,livein/2
-	 ,uses/1
-	 ,defines/1
-	 ,defines_all_alloc/1
+-export([number_of_temporaries/2
+	 ,analyze/2
+	 ,labels/2
+	 ,all_precoloured/1
+	 ,bb/3
+	 ,liveout/3
+	 ,reg_nr/2
+	 ,def_use/2
+	 ,is_move/2
+	 ,is_precoloured/2
+	 ,var_range/2
+	 ,allocatable/1
+	 ,non_alloc/2
+	 ,physical_name/2
+	 ,reverse_postorder/2
+	 ,livein/3
+	 ,uses/2
+	 ,defines/2
+	 ,defines_all_alloc/2
 	]).
 
 %% for hipe_graph_coloring_regalloc:
--export([is_fixed/1]).
+-export([is_fixed/2]).
 
 %% for hipe_ls_regalloc:
--export([args/1, is_arg/1, is_global/1, new_spill_index/1]).
--export([breadthorder/1, postorder/1]).
+-export([args/2, is_arg/2, is_global/2, new_spill_index/2]).
+-export([breadthorder/2, postorder/2]).
 
 %% callbacks for hipe_regalloc_loop
--export([check_and_rewrite/2]).
+-export([check_and_rewrite/3]).
 
 %% callbacks for hipe_regalloc_prepass
--export([new_reg_nr/0,
-	 update_reg_nr/2,
-	 update_bb/3,
-	 subst_temps/2]).
+-export([new_reg_nr/1,
+	 update_reg_nr/3,
+	 update_bb/4,
+	 subst_temps/3]).
 
-check_and_rewrite(CFG, Coloring) ->
+check_and_rewrite(CFG, Coloring, _) ->
   hipe_ppc_ra_postconditions:check_and_rewrite(CFG, Coloring, 'normal').
 
-reverse_postorder(CFG) ->
+reverse_postorder(CFG, _) ->
   hipe_ppc_cfg:reverse_postorder(CFG).
 
-non_alloc(CFG) ->
-  non_alloc(hipe_ppc_registers:nr_args(), hipe_ppc_cfg:params(CFG)).
+non_alloc(CFG, no_context) ->
+  non_alloc_1(hipe_ppc_registers:nr_args(), hipe_ppc_cfg:params(CFG)).
 
 %% same as hipe_ppc_frame:fix_formals/2
-non_alloc(0, Rest) -> Rest;
-non_alloc(N, [_|Rest]) -> non_alloc(N-1, Rest);
-non_alloc(_, []) -> [].
+non_alloc_1(0, Rest) -> Rest;
+non_alloc_1(N, [_|Rest]) -> non_alloc_1(N-1, Rest);
+non_alloc_1(_, []) -> [].
 
 %% Liveness stuff
 
-analyze(CFG) ->
+analyze(CFG, _) ->
   hipe_ppc_liveness_gpr:analyse(CFG).
 
-livein(Liveness,L) ->
+livein(Liveness,L,_) ->
   [X || X <- hipe_ppc_liveness_gpr:livein(Liveness,L),
 	hipe_ppc:temp_is_allocatable(X)].
 
-liveout(BB_in_out_liveness,Label) ->
+liveout(BB_in_out_liveness,Label,_) ->
   [X || X <- hipe_ppc_liveness_gpr:liveout(BB_in_out_liveness,Label),
 	hipe_ppc:temp_is_allocatable(X)].
 
 %% Registers stuff
 
-allocatable() ->
+allocatable(no_context) ->
   hipe_ppc_registers:allocatable_gpr().
 
-all_precoloured() ->
+all_precoloured(no_context) ->
   hipe_ppc_registers:all_precoloured().
 
-is_precoloured(Reg) ->
+is_precoloured(Reg, _) ->
   hipe_ppc_registers:is_precoloured_gpr(Reg).
 
-is_fixed(R) ->
+is_fixed(R, _) ->
   hipe_ppc_registers:is_fixed(R).
 
-physical_name(Reg) ->
+physical_name(Reg, _) ->
   Reg.
 
 %% CFG stuff
 
-labels(CFG) ->
+labels(CFG, _) ->
   hipe_ppc_cfg:labels(CFG).
 
-var_range(_CFG) ->
+var_range(_CFG, _) ->
   hipe_gensym:var_range(ppc).
 
-number_of_temporaries(_CFG) ->
+number_of_temporaries(_CFG, _) ->
   Highest_temporary = hipe_gensym:get_var(ppc),
   %% Since we can have temps from 0 to Max adjust by +1.
   Highest_temporary + 1.
 
-bb(CFG,L) ->
+bb(CFG,L,_) ->
   hipe_ppc_cfg:bb(CFG,L).
 
-update_bb(CFG,L,BB) ->
+update_bb(CFG,L,BB,_) ->
   hipe_ppc_cfg:bb_add(CFG,L,BB).
 
 %% PowerPC stuff
 
-def_use(Instruction) ->
-  {defines(Instruction), uses(Instruction)}.
+def_use(Instruction, Ctx) ->
+  {defines(Instruction, Ctx), uses(Instruction, Ctx)}.
 
-uses(I) ->
+uses(I, _) ->
   [X || X <- hipe_ppc_defuse:insn_use_gpr(I),
 	hipe_ppc:temp_is_allocatable(X)].
 
-defines(I) ->
+defines(I, _) ->
   [X || X <- hipe_ppc_defuse:insn_def_gpr(I),
 	hipe_ppc:temp_is_allocatable(X)].
 
-defines_all_alloc(I) ->
+defines_all_alloc(I, _) ->
   hipe_ppc_defuse:insn_defs_all_gpr(I).
 
-is_move(Instruction) ->
+is_move(Instruction, _) ->
   case hipe_ppc:is_pseudo_move(Instruction) of
     true ->
       Dst = hipe_ppc:pseudo_move_dst(Instruction),
@@ -151,16 +151,16 @@ is_move(Instruction) ->
     false -> false
   end.
 
-reg_nr(Reg) ->
+reg_nr(Reg, _) ->
   hipe_ppc:temp_reg(Reg).
 
-new_reg_nr() ->
+new_reg_nr(_) ->
   hipe_gensym:get_next_var(ppc).
 
-update_reg_nr(Nr, Temp) ->
+update_reg_nr(Nr, Temp, _) ->
   hipe_ppc:mk_temp(Nr, hipe_ppc:temp_type(Temp)).
 
-subst_temps(SubstFun, Instr) ->
+subst_temps(SubstFun, Instr, _) ->
   hipe_ppc_subst:insn_temps(
     fun(Op) ->
 	case hipe_ppc:temp_is_allocatable(Op)
@@ -173,23 +173,23 @@ subst_temps(SubstFun, Instr) ->
 
 %%% Linear Scan stuff
 
-new_spill_index(SpillIndex) when is_integer(SpillIndex) ->
+new_spill_index(SpillIndex, _) when is_integer(SpillIndex) ->
   SpillIndex+1.
 
-breadthorder(CFG) ->
+breadthorder(CFG, _) ->
   hipe_ppc_cfg:breadthorder(CFG).
 
-postorder(CFG) ->
+postorder(CFG, _) ->
   hipe_ppc_cfg:postorder(CFG).
 
-is_global(R) ->
+is_global(R, _) ->
   R =:= hipe_ppc_registers:temp1() orelse
   R =:= hipe_ppc_registers:temp2() orelse
   R =:= hipe_ppc_registers:temp3() orelse
   hipe_ppc_registers:is_fixed(R).
 
-is_arg(R) ->
+is_arg(R, _) ->
   hipe_ppc_registers:is_arg(R).
 
-args(CFG) ->
+args(CFG, _) ->
   hipe_ppc_registers:args(hipe_ppc_cfg:arity(CFG)).