Merge branch 'master' into sverker/master/load_nif-print-init-error

1 files changed, 87 insertions, 60 deletions

diff --git a/lib/hipe/regalloc/hipe_x86_specific.erl b/lib/hipe/regalloc/hipe_x86_specific.erl
index 4edf8674b7..67c45cdca5 100644
--- a/lib/hipe/regalloc/hipe_x86_specific.erl
+++ b/lib/hipe/regalloc/hipe_x86_specific.erl
@@ -25,100 +25,105 @@
 -define(HIPE_X86_REGISTERS, hipe_amd64_registers).
 -define(HIPE_X86_LIVENESS, hipe_amd64_liveness).
 -define(HIPE_X86_DEFUSE, hipe_amd64_defuse).
+-define(HIPE_X86_SUBST, hipe_amd64_subst).
 -else.
 -define(HIPE_X86_SPECIFIC, hipe_x86_specific).
 -define(HIPE_X86_RA_POSTCONDITIONS, hipe_x86_ra_postconditions).
 -define(HIPE_X86_REGISTERS, hipe_x86_registers).
 -define(HIPE_X86_LIVENESS, hipe_x86_liveness).
 -define(HIPE_X86_DEFUSE, hipe_x86_defuse).
+-define(HIPE_X86_SUBST, hipe_x86_subst).
 -endif.
 
 -module(?HIPE_X86_SPECIFIC).
 
--export([number_of_temporaries/1]).
+-export([number_of_temporaries/2]).
 
 %% The following exports are used as M:F(...) calls from other modules;
 %% e.g. hipe_x86_ra_ls.
--export([analyze/1,
-	 bb/2,
-	 args/1,
-	 labels/1,
-	 livein/2,
-	 liveout/2,
-	 uses/1,
-	 defines/1,
-	 def_use/1,
-	 is_arg/1,	% used by hipe_ls_regalloc
-	 is_move/1,
-	 is_fixed/1,	% used by hipe_graph_coloring_regalloc
-	 is_global/1,
-	 is_precoloured/1,
-	 reg_nr/1,
-	 non_alloc/1,
-	 allocatable/0,
-	 physical_name/1,
-	 all_precoloured/0,
-	 new_spill_index/1,	% used by hipe_ls_regalloc
-	 var_range/1,
-	 breadthorder/1,
-	 postorder/1,
-	 reverse_postorder/1]).
+-export([analyze/2,
+	 bb/3,
+	 args/2,
+	 labels/2,
+	 livein/3,
+	 liveout/3,
+	 uses/2,
+	 defines/2,
+	 defines_all_alloc/2,
+	 def_use/2,
+	 is_arg/2,	% used by hipe_ls_regalloc
+	 is_move/2,
+	 is_fixed/2,	% used by hipe_graph_coloring_regalloc
+	 is_global/2,
+	 is_precoloured/2,
+	 reg_nr/2,
+	 non_alloc/2,
+	 allocatable/1,
+	 physical_name/2,
+	 all_precoloured/1,
+	 new_spill_index/2,	% used by hipe_ls_regalloc
+	 var_range/2,
+	 breadthorder/2,
+	 postorder/2,
+	 reverse_postorder/2]).
 
 %% callbacks for hipe_regalloc_loop
--export([defun_to_cfg/1,
-	 check_and_rewrite/2]).
+-export([check_and_rewrite/3]).
 
-defun_to_cfg(Defun) ->
-  hipe_x86_cfg:init(Defun).
+%% callbacks for hipe_regalloc_prepass
+-export([new_reg_nr/1,
+	 update_reg_nr/3,
+	 update_bb/4,
+	 subst_temps/3]).
 
-check_and_rewrite(Defun, Coloring) ->
-  ?HIPE_X86_RA_POSTCONDITIONS:check_and_rewrite(Defun, Coloring, 'normal').
+check_and_rewrite(CFG, Coloring, _) ->
+  ?HIPE_X86_RA_POSTCONDITIONS:check_and_rewrite(CFG, Coloring, 'normal').
 
-reverse_postorder(CFG) ->
+reverse_postorder(CFG, _) ->
   hipe_x86_cfg:reverse_postorder(CFG).
 
-breadthorder(CFG) ->
+breadthorder(CFG, _) ->
   hipe_x86_cfg:breadthorder(CFG).
 
-postorder(CFG) ->
+postorder(CFG, _) ->
   hipe_x86_cfg:postorder(CFG).
 
 %% Globally defined registers for linear scan
-is_global(R) ->
+is_global(R, _) ->
   ?HIPE_X86_REGISTERS:temp1() =:= R orelse
   ?HIPE_X86_REGISTERS:temp0() =:= R orelse
   ?HIPE_X86_REGISTERS:is_fixed(R).
 
-is_fixed(R) ->
+is_fixed(R, _) ->
   ?HIPE_X86_REGISTERS:is_fixed(R).
 
-is_arg(R) ->
+is_arg(R, _) ->
   ?HIPE_X86_REGISTERS:is_arg(R).
 
-args(CFG) ->
+args(CFG, _) ->
   ?HIPE_X86_REGISTERS:args(hipe_x86_cfg:arity(CFG)).
 
-non_alloc(CFG) ->
-  non_alloc(?HIPE_X86_REGISTERS:nr_args(), hipe_x86_cfg:params(CFG)).
+non_alloc(CFG, _) ->
+  non_alloc_1(?HIPE_X86_REGISTERS:nr_args(), hipe_x86_cfg:params(CFG)).
 
 %% same as hipe_x86_frame:fix_formals/2
-non_alloc(0, Rest) -> Rest;
-non_alloc(N, [_|Rest]) -> non_alloc(N-1, Rest);
-non_alloc(_, []) -> [].
+non_alloc_1(0, Rest) -> Rest;
+non_alloc_1(N, [_|Rest]) -> non_alloc_1(N-1, Rest);
+non_alloc_1(_, []) -> [].
 
 %% Liveness stuff
 
-analyze(CFG) ->
+analyze(CFG, _) ->
   ?HIPE_X86_LIVENESS:analyze(CFG).
 
-livein(Liveness,L) ->
+livein(Liveness,L,_) ->
   [X || X <- ?HIPE_X86_LIVENESS:livein(Liveness,L),
 	hipe_x86:temp_is_allocatable(X),
 	hipe_x86:temp_reg(X) =/= ?HIPE_X86_REGISTERS:fcalls(),
 	hipe_x86:temp_reg(X) =/= ?HIPE_X86_REGISTERS:heap_limit(),
 	hipe_x86:temp_type(X) =/= 'double'].
 
-liveout(BB_in_out_liveness,Label) ->
+liveout(BB_in_out_liveness,Label,_) ->
   [X || X <- ?HIPE_X86_LIVENESS:liveout(BB_in_out_liveness,Label),
 	hipe_x86:temp_is_allocatable(X),
 	hipe_x86:temp_reg(X) =/= ?HIPE_X86_REGISTERS:fcalls(),
@@ -127,37 +132,40 @@ liveout(BB_in_out_liveness,Label) ->
 
 %% Registers stuff
 
-allocatable() ->
+allocatable(_) ->
   ?HIPE_X86_REGISTERS:allocatable().
 
-all_precoloured() ->
+all_precoloured(_) ->
   ?HIPE_X86_REGISTERS:all_precoloured().
 
-is_precoloured(Reg) ->
+is_precoloured(Reg,_) ->
   ?HIPE_X86_REGISTERS:is_precoloured(Reg).
 
-physical_name(Reg) ->
+physical_name(Reg,_) ->
   Reg.
 
 %% CFG stuff
 
-labels(CFG) ->
+labels(CFG,_) ->
   hipe_x86_cfg:labels(CFG).
 
-var_range(_CFG) ->
+var_range(_CFG,_) ->
   hipe_gensym:var_range(x86).
 
-number_of_temporaries(_CFG) ->
+number_of_temporaries(_CFG,_) ->
   Highest_temporary = hipe_gensym:get_var(x86),
   %% Since we can have temps from 0 to Max adjust by +1.
   Highest_temporary + 1.
 
-bb(CFG,L) ->
+bb(CFG,L,_) ->
   hipe_x86_cfg:bb(CFG,L).
 
+update_bb(CFG,L,BB,_) ->
+  hipe_x86_cfg:bb_add(CFG,L,BB).
+
 %% X86 stuff
 
-def_use(Instruction) ->
+def_use(Instruction,_) ->
   {[X || X <- ?HIPE_X86_DEFUSE:insn_def(Instruction),
 	 hipe_x86:temp_is_allocatable(X),
 	 hipe_x86:temp_type(X) =/= 'double'],
@@ -166,17 +174,19 @@ def_use(Instruction) ->
 	 hipe_x86:temp_type(X) =/= 'double']
   }.
 
-uses(I) ->
+uses(I,_) ->
   [X || X <- ?HIPE_X86_DEFUSE:insn_use(I),
 	hipe_x86:temp_is_allocatable(X),
 	hipe_x86:temp_type(X) =/= 'double'].
 
-defines(I) ->
+defines(I,_) ->
   [X || X <- ?HIPE_X86_DEFUSE:insn_def(I),
 	hipe_x86:temp_is_allocatable(X),
 	hipe_x86:temp_type(X) =/= 'double'].
 
-is_move(Instruction) ->
+defines_all_alloc(I,_) -> ?HIPE_X86_DEFUSE:insn_defs_all(I).
+
+is_move(Instruction,_) ->
   case hipe_x86:is_move(Instruction) of
     true ->
       Src = hipe_x86:move_src(Instruction),
@@ -197,8 +207,25 @@ is_move(Instruction) ->
     false -> false
   end.
 
-reg_nr(Reg) ->
+reg_nr(Reg,_) ->
   hipe_x86:temp_reg(Reg).
 
-new_spill_index(SpillIndex) when is_integer(SpillIndex) ->
+new_reg_nr(_) ->
+  hipe_gensym:get_next_var(x86).
+
+update_reg_nr(Nr, Temp, _) ->
+  hipe_x86:mk_temp(Nr, hipe_x86:temp_type(Temp)).
+
+subst_temps(SubstFun, Instr, _) ->
+  ?HIPE_X86_SUBST:insn_temps(
+    fun(Op) ->
+	case hipe_x86:temp_is_allocatable(Op)
+	  andalso hipe_x86:temp_type(Op) =/= 'double'
+	of
+	  true -> SubstFun(Op);
+	  false -> Op
+	end
+    end, Instr).
+
+new_spill_index(SpillIndex, _) when is_integer(SpillIndex) ->
   SpillIndex+1.