hipe: Refactor ra callbacks to accept context arg

This allows us to pass around the context data that
hipe_regalloc_prepass needs cleanly, without using process dictionary or
parameterised modules (like it was previous to this change).

1 files changed, 50 insertions, 50 deletions

diff --git a/lib/hipe/regalloc/hipe_x86_specific_x87.erl b/lib/hipe/regalloc/hipe_x86_specific_x87.erl
index cd4d02491d..85923f8f44 100644
--- a/lib/hipe/regalloc/hipe_x86_specific_x87.erl
+++ b/lib/hipe/regalloc/hipe_x86_specific_x87.erl
@@ -32,118 +32,118 @@
 -endif.
 
 -module(?HIPE_X86_SPECIFIC_X87).
--export([allocatable/1,
-	 is_precoloured/1,
-	 %% var_range/1,
-	 %% def_use/1,
-	 %% is_fixed/1,
-	 is_arg/1,
-	 %% non_alloc/1,
-	 new_spill_index/1,
-	 number_of_temporaries/1
+-export([allocatable/2,
+	 is_precoloured/2,
+	 %% var_range/2,
+	 %% def_use/2,
+	 %% is_fixed/2,
+	 is_arg/2,
+	 %% non_alloc/2,
+	 new_spill_index/2,
+	 number_of_temporaries/2
 	]).
 
 %% The following exports are used as M:F(...) calls from other modules;
 %% e.g. hipe_x86_ra_ls.
--export([analyze/1,
-	 bb/2,
-	 args/1,
-	 labels/1,
-	 livein/2,
-	 liveout/2,
-	 uses/1,
-	 defines/1,
-	 defines_all_alloc/1,
-	 is_global/1,
-	 reg_nr/1,
-	 physical_name/1,
-	 breadthorder/1,
-	 postorder/1,
-	 reverse_postorder/1]).
+-export([analyze/2,
+	 bb/3,
+	 args/2,
+	 labels/2,
+	 livein/3,
+	 liveout/3,
+	 uses/2,
+	 defines/2,
+	 defines_all_alloc/2,
+	 is_global/2,
+	 reg_nr/2,
+	 physical_name/2,
+	 breadthorder/2,
+	 postorder/2,
+	 reverse_postorder/2]).
 
 %% callbacks for hipe_x86_ra_ls
--export([check_and_rewrite/3]).
+-export([check_and_rewrite/4]).
 
 %% Rewrite happens in hipe_x86_ra_finalise:finalise/4
-check_and_rewrite(CFG, _Coloring, 'linearscan') ->
+check_and_rewrite(CFG, _Coloring, 'linearscan', _) ->
   {CFG, false}.
 
-breadthorder(CFG) ->
+breadthorder(CFG, _) ->
   hipe_x86_cfg:breadthorder(CFG).
-postorder(CFG) ->
+postorder(CFG, _) ->
   hipe_x86_cfg:postorder(CFG).
-reverse_postorder(CFG) ->
+reverse_postorder(CFG, _) ->
   hipe_x86_cfg:reverse_postorder(CFG).
 
-is_global(_) ->
+is_global(_, _) ->
   false.
 
 -ifdef(notdef).
-is_fixed(_) ->
+is_fixed(_, _) ->
   false.
 -endif.
 
-is_arg(_) ->
+is_arg(_, _) ->
   false.
 
-args(_) ->
+args(_, _) ->
   [].
 
 -ifdef(notdef).
-non_alloc(_) ->
+non_alloc(_, _) ->
   [].
 -endif.
 
 %% Liveness stuff
 
-analyze(CFG) ->
+analyze(CFG, _) ->
   ?HIPE_X86_LIVENESS:analyze(CFG).
 
-livein(Liveness,L) ->
+livein(Liveness,L,_) ->
   [X || X <- ?HIPE_X86_LIVENESS:livein(Liveness,L),
  	     hipe_x86:temp_is_allocatable(X),
  	     hipe_x86:temp_type(X) =:= 'double'].
 
-liveout(BB_in_out_liveness,Label) ->
+liveout(BB_in_out_liveness,Label,_) ->
   [X || X <- ?HIPE_X86_LIVENESS:liveout(BB_in_out_liveness,Label),
 	     hipe_x86:temp_is_allocatable(X),
 	     hipe_x86:temp_type(X) =:= 'double'].
 
 %% Registers stuff
 
-allocatable('linearscan') ->
+allocatable('linearscan', _) ->
   ?HIPE_X86_REGISTERS:allocatable_x87().
 
-is_precoloured(Reg) ->
+is_precoloured(Reg, _) ->
   ?HIPE_X86_REGISTERS:is_precoloured_x87(Reg).
 
-physical_name(Reg) ->
+physical_name(Reg, _) ->
   Reg.
 
 %% CFG stuff
 
-labels(CFG) ->
+labels(CFG, _) ->
   hipe_x86_cfg:labels(CFG).
 
 -ifdef(notdef).
-var_range(_CFG) ->
+var_range(_CFG, _) ->
   {Min,Max} = hipe_gensym:var_range(x86),
   %% io:format("Var_range: ~w\n",[{Min,Max}]),
   {Min,Max}.
 -endif.
 
-number_of_temporaries(_CFG) ->
+number_of_temporaries(_CFG, _) ->
   Highest_temporary = hipe_gensym:get_var(x86),
   %% Since we can have temps from 0 to Max adjust by +1.
   Highest_temporary + 1.
 
-bb(CFG,L) ->
+bb(CFG,L,_) ->
   hipe_x86_cfg:bb(CFG,L).
 
 %% X86 stuff
 
 -ifdef(notdef).
-def_use(Instruction) ->
+def_use(Instruction, _) ->
   {[X || X <- ?HIPE_X86_DEFUSE:insn_def(Instruction),
 	      hipe_x86:temp_is_allocatable(X),
 	      temp_is_double(X)],
@@ -153,23 +153,23 @@ def_use(Instruction) ->
   }.
 -endif.
 
-uses(I) ->
+uses(I, _) ->
   [X || X <- ?HIPE_X86_DEFUSE:insn_use(I),
  	     hipe_x86:temp_is_allocatable(X),
  	     temp_is_double(X)].
 
-defines(I) ->
+defines(I, _) ->
   [X || X <- ?HIPE_X86_DEFUSE:insn_def(I),
  	     hipe_x86:temp_is_allocatable(X),
  	     temp_is_double(X)].
 
-defines_all_alloc(I) -> hipe_amd64_defuse:insn_defs_all(I).
+defines_all_alloc(I, _) -> hipe_amd64_defuse:insn_defs_all(I).
 
 temp_is_double(Temp) ->
   hipe_x86:temp_type(Temp) =:= 'double'.
 
-reg_nr(Reg) ->
+reg_nr(Reg, _) ->
   hipe_x86:temp_reg(Reg).
 
-new_spill_index(SpillIndex) ->
+new_spill_index(SpillIndex, _) ->
   SpillIndex+1.