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authorMagnus Lång <[email protected]>2016-06-22 18:08:57 +0200
committerMagnus Lång <[email protected]>2016-09-02 15:59:17 +0200
commit60b5deae9ca2cb3540c899b19151b7e3391d305d (patch)
tree5cf8b34ef859e407070367c809351bac8742569f /lib/hipe/regalloc
parent38c10d20f7b0a83f4d94a92d30ca649b86b0a7cb (diff)
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hipe_arm: Add code rewrite RA callbacks
These will not only be useful for hipe_regalloc_prepass, but also, after the introduction of a mk_move/2 (or similar) callback, for the purpose of range splitting. Since the substitution needed to case over all the instructions, a new module, hipe_arm_subst, was introduced to the arm backend.
Diffstat (limited to 'lib/hipe/regalloc')
-rw-r--r--lib/hipe/regalloc/hipe_arm_specific.erl24
1 files changed, 24 insertions, 0 deletions
diff --git a/lib/hipe/regalloc/hipe_arm_specific.erl b/lib/hipe/regalloc/hipe_arm_specific.erl
index 614eb22a1f..251f1f7361 100644
--- a/lib/hipe/regalloc/hipe_arm_specific.erl
+++ b/lib/hipe/regalloc/hipe_arm_specific.erl
@@ -53,6 +53,12 @@
%% callbacks for hipe_regalloc_loop
-export([check_and_rewrite/2]).
+%% callbacks for hipe_regalloc_prepass
+-export([new_reg_nr/0,
+ update_reg_nr/2,
+ update_bb/3,
+ subst_temps/2]).
+
check_and_rewrite(CFG, Coloring) ->
hipe_arm_ra_postconditions:check_and_rewrite(CFG, Coloring, 'normal').
@@ -113,6 +119,9 @@ number_of_temporaries(_CFG) ->
bb(CFG,L) ->
hipe_arm_cfg:bb(CFG,L).
+update_bb(CFG,L,BB) ->
+ hipe_arm_cfg:bb_add(CFG,L,BB).
+
%% ARM stuff
def_use(Instruction) ->
@@ -145,6 +154,21 @@ is_move(Instruction) ->
reg_nr(Reg) ->
hipe_arm:temp_reg(Reg).
+new_reg_nr() ->
+ hipe_gensym:get_next_var(arm).
+
+update_reg_nr(Nr, Temp) ->
+ hipe_arm:mk_temp(Nr, hipe_arm:temp_type(Temp)).
+
+subst_temps(SubstFun, Instr) ->
+ hipe_arm_subst:insn_temps(
+ fun(Op) ->
+ case hipe_arm:temp_is_allocatable(Op) of
+ true -> SubstFun(Op);
+ false -> Op
+ end
+ end, Instr).
+
%%% Linear Scan stuff
new_spill_index(SpillIndex) when is_integer(SpillIndex) ->