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author | Sverker Eriksson <[email protected]> | 2016-11-22 12:02:07 +0100 |
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committer | Sverker Eriksson <[email protected]> | 2016-11-22 12:02:07 +0100 |
commit | 3d7b55f946162b5a129241dbe67397784a1ba1a5 (patch) | |
tree | 8a3809296bdfcdd16ebbf78975ea18034b22d62c /lib/hipe/x86/hipe_x86_encode.erl | |
parent | 9491f6727f12e37241863bd5becbd1f336ff7659 (diff) | |
parent | fda3c9575d77bed0250f76f17e92d18836e15d0c (diff) | |
download | otp-3d7b55f946162b5a129241dbe67397784a1ba1a5.tar.gz otp-3d7b55f946162b5a129241dbe67397784a1ba1a5.tar.bz2 otp-3d7b55f946162b5a129241dbe67397784a1ba1a5.zip |
Merge branch 'margnus1/hipe/refactor-rtl/PR-1243'
* margnus1/hipe/refactor-rtl/PR-1243:
hipe_x86: Fix encoding of test instr w/ neg imm
hipe_tagscheme: Simplify test_two_fixnums with imm
hipe_icode: Always const-propagate if&call args
hipe_tagscheme: x86 lea+test for mask_and_compare
hipe_tagscheme: Improve fixnum_addsub with imm
hipe: Make realloc_binary fast case true branch
hipe_x86_postpass: Negate conditions in goto elim
hipe_tagscheme: Improve fixnum add on x86
hipe_rtl_to_x86: Use LEA only for immediate adds
hipe_x86: LeaToAdd peephole rule
hipe_sparc: move coalescing
hipe_ppc: better rlwinm pp
hipe_ppc: move coalescing
hipe_rtl: drop alub dest when unused
hipe_rtl: unify branch and alub
hipe_x86: Fix&activate ElimCmp0 peephole rule
hipe_{x86,amd64}: Finish test instr implementation
Diffstat (limited to 'lib/hipe/x86/hipe_x86_encode.erl')
-rw-r--r-- | lib/hipe/x86/hipe_x86_encode.erl | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/lib/hipe/x86/hipe_x86_encode.erl b/lib/hipe/x86/hipe_x86_encode.erl index 3b7be86608..2d1663d0d6 100644 --- a/lib/hipe/x86/hipe_x86_encode.erl +++ b/lib/hipe/x86/hipe_x86_encode.erl @@ -65,6 +65,7 @@ cc/1, % 8-bit registers %% al/0, cl/0, dl/0, bl/0, ah/0, ch/0, dh/0, bh/0, + reg_has_8bit/1, % 32-bit registers %% eax/0, ecx/0, edx/0, ebx/0, esp/0, ebp/0, esi/0, edi/0, % operands @@ -143,6 +144,8 @@ cc(g) -> ?CC_G. %% dh() -> ?DH. %% bh() -> ?BH. +reg_has_8bit(Reg) -> Reg =< ?BL. + %%% 32-bit registers -define(EAX, 2#000). @@ -700,8 +703,16 @@ shd_op_sizeof(Opnds) -> test_encode(Opnds) -> case Opnds of + {al, {imm8,Imm8}} -> + [16#A8, Imm8]; + {ax, {imm16,Imm16}} -> + [?PFX_OPND, 16#A9 | le16(Imm16, [])]; {eax, {imm32,Imm32}} -> [16#A9 | le32(Imm32, [])]; + {{rm8,RM8}, {imm8,Imm8}} -> + [16#F6 | encode_rm(RM8, 2#000, [Imm8])]; + {{rm16,RM16}, {imm16,Imm16}} -> + [?PFX_OPND, 16#F7 | encode_rm(RM16, 2#000, le16(Imm16, []))]; {{rm32,RM32}, {imm32,Imm32}} -> [16#F7 | encode_rm(RM32, 2#000, le32(Imm32, []))]; {{rm32,RM32}, {reg32,Reg32}} -> @@ -710,8 +721,16 @@ test_encode(Opnds) -> test_sizeof(Opnds) -> case Opnds of + {al, {imm8,_}} -> + 1 + 1; + {ax, {imm16,_}} -> + 2 + 2; {eax, {imm32,_}} -> 1 + 4; + {{rm8,RM8}, {imm8,_}} -> + 1 + sizeof_rm(RM8) + 1; + {{rm16,RM16}, {imm16,_}} -> + 2 + sizeof_rm(RM16) + 2; {{rm32,RM32}, {imm32,_}} -> 1 + sizeof_rm(RM32) + 4; {{rm32,RM32}, {reg32,_}} -> @@ -1283,7 +1302,11 @@ dotest1(OS) -> t(OS,'sub',{RM32,Imm8}), t(OS,'sub',{RM32,Reg32}), t(OS,'sub',{Reg32,RM32}), + t(OS,'test',{al,Imm8}), + t(OS,'test',{ax,Imm16}), t(OS,'test',{eax,Imm32}), + t(OS,'test',{RM8,Imm8}), + t(OS,'test',{RM16,Imm16}), t(OS,'test',{RM32,Imm32}), t(OS,'test',{RM32,Reg32}), t(OS,'xor',{eax,Imm32}), |