Implement ./otp_build configure --enable-silent-rules

With silent rules, the output of make is less verbose and compilation
warnings are easier to spot. Silent rules are disabled by default and
can be disabled or enabled at will by make V=0 and make V=1.

1 files changed, 112 insertions, 0 deletions

diff --git a/make/output.mk.in b/make/output.mk.in
new file mode 100644
index 0000000000..2f1a1d3a79
--- /dev/null
+++ b/make/output.mk.in
@@ -0,0 +1,112 @@
+#-*-makefile-*-   ; force emacs to enter makefile-mode
+# ----------------------------------------------------
+# Make include file for otp
+#
+# %CopyrightBegin%
+#
+# Copyright Ericsson AB 1997-2012. All Rights Reserved.
+#
+# The contents of this file are subject to the Erlang Public License,
+# Version 1.1, (the "License"); you may not use this file except in
+# compliance with the License. You should have received a copy of the
+# Erlang Public License along with this software. If not, it can be
+# retrieved online at http://www.erlang.org/.
+#
+# Software distributed under the License is distributed on an "AS IS"
+# basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
+# the License for the specific language governing rights and limitations
+# under the License.
+#
+# %CopyrightEnd%
+#
+# Author: Anthony Ramine
+# ----------------------------------------------------
+
+ifeq ($(V),)
+V = @DEFAULT_VERBOSITY@
+endif
+
+ifeq ($(V),0)
+v_p = 0
+else
+v_p = 1
+endif
+
+V_at_0 = @
+V_at = $(V_at_$(V))
+
+V_colon_0 = @: ""
+V_colon = $(V_colon_$(V))
+
+ar_verbose_0 = @echo " AR	"$@;
+ar_verbose = $(ar_verbose_$(V))
+V_AR = $(ar_verbose)$(AR)
+
+asn_verbose_0 = @echo " ASN	"$@;
+asn_verbose = $(asn_verbose_$(V))
+
+cc_verbose_0 = @echo " CC	"$@;
+cc_verbose = $(cc_verbose_$(V))
+V_CC = $(cc_verbose)$(CC)
+
+dia_verbose_0 = @echo " DIA	"$@;
+dia_verbose = $(dia_verbose_$(V))
+
+dtrace_verbose_0 = @echo " DTRACE	"$@;
+dtrace_verbose = $(dtrace_verbose_$(V))
+
+emacs_verbose_0 = @echo " EMACS	"$@;
+emacs_verbose = $(emacs_verbose_$(V))
+
+emu_cc_verbose_0 = @echo " EMU_CC	"$@;
+emu_cc_verbose = $(emu_cc_verbose_$(V))
+V_EMU_CC = $(emu_cc_verbose)$(EMU_CC)
+
+erlc_verbose_0 = @echo " ERLC	"$@;
+erlc_verbose = $(erlc_verbose_$(V))
+V_ERLC = $(erlc_verbose)$(ERLC)
+
+gen_verbose_0 = @echo " GEN	"$@;
+gen_verbose = $(gen_verbose_$(V))
+
+javac_verbose_0 = @echo " JAVAC	"$@;
+javac_verbose = $(javac_verbose_$(V))
+V_JAVAC = $(javac_verbose)$(JAVAC)
+
+ld_verbose_0 = @echo " LD	"$@;
+ld_verbose = $(ld_verbose_$(V))
+V_LD = $(ld_verbose)$(LD)
+
+leex_verbose_0 = @echo " LEEX	"$@;
+leex_verbose = $(leex_verbose_$(V))
+
+lex_verbose_0 = @echo " LEX	"$@;
+lex_verbose = $(lex_verbose_$(V))
+V_LEX = $(lex_verbose)$(LEX)
+
+m4_verbose_0 = @echo " M4	"$@;
+m4_verbose = $(m4_verbose_$(V))
+
+make_verbose_0 = @echo " MAKE	"$@;
+make_verbose = $(make_verbose_$(V))
+
+mc_verbose_0 = @echo " MC	"$@;
+mc_verbose = $(mc_verbose_$(V))
+V_MC = $(mc_verbose)$(MC)
+
+ranlib_verbose_0 = @echo " RANLIB	"$@;
+ranlib_verbose = $(ranlib_verbose_$(V))
+V_RANLIB = $(ranlib_verbose)$(RANLIB)
+
+rc_verbose_0 = @echo " RC	"$@;
+rc_verbose = $(rc_verbose_$(V))
+V_RC = $(rc_verbose)$(RC)
+
+snmp_verbose_0 = @echo " SNMP	"$@;
+snmp_verbose = $(snmp_verbose_$(V))
+
+vsn_verbose_0 = @echo " VSN	"$@;
+vsn_verbose = $(vsn_verbose_$(V))
+
+yecc_verbose_0 = @echo " YECC	"$@;
+yecc_verbose = $(yecc_verbose_$(V))