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-rw-r--r--lib/compiler/test/beam_ssa_SUITE.erl41
1 files changed, 41 insertions, 0 deletions
diff --git a/lib/compiler/test/beam_ssa_SUITE.erl b/lib/compiler/test/beam_ssa_SUITE.erl
index a741ebbdf9..dd1b7ddcd3 100644
--- a/lib/compiler/test/beam_ssa_SUITE.erl
+++ b/lib/compiler/test/beam_ssa_SUITE.erl
@@ -190,6 +190,15 @@ recv(_Config) ->
self() ! {[self(),r1],{2,99,<<"data">>}},
{Parent,r1,<<1:32,2:8,99:8,"data">>} = tricky_recv_4(),
+ %% Test tricky_recv_5/0.
+ self() ! 1,
+ a = tricky_recv_5(),
+ self() ! 2,
+ b = tricky_recv_5(),
+
+ %% tricky_recv_6/0 is a compile-time error.
+ tricky_recv_6(),
+
ok.
sync_wait_mon({Pid, Ref}, Timeout) ->
@@ -295,6 +304,38 @@ tricky_recv_4() ->
end,
id({Pid,R,Request}).
+%% beam_ssa_pre_codegen would accidentally create phi nodes on critical edges
+%% when fixing up receives; the call to id/2 can either succeed or land in the
+%% catch block, and we added a phi node to its immediate successor.
+tricky_recv_5() ->
+ try
+ receive
+ X=1 ->
+ id(42),
+ a;
+ X=2 ->
+ b
+ end,
+ case X of
+ 1 -> a;
+ 2 -> b
+ end
+ catch
+ _:_ -> c
+ end.
+
+%% When fixing tricky_recv_5, we introduced a compiler crash when the common
+%% exit block was ?BADARG_BLOCK and floats were in the picture.
+tricky_recv_6() ->
+ RefA = make_ref(),
+ RefB = make_ref(),
+ receive
+ {RefA, Number} -> Number + 1.0;
+ {RefB, Number} -> Number + 2.0
+ after 0 ->
+ ok
+ end.
+
maps(_Config) ->
{'EXIT',{{badmatch,#{}},_}} = (catch maps_1(any)),
ok.