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* lukas/ose/remove/OTP-12573:
Remove OSE from erl_interface
ose: Remove all code related to the OSE port
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The OSE port is no longer supported and this commit removed it
and any changes related to it. The things that were general
improvements have been left in the code.
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* c-rack/fix-typo2:
Fix small typo
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* redvers/public_key_docfix:
Updated documentation to match implementation
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* maint:
Updated OTP version
Prepare release
Fix calculation of end time
Prefer monotonic time that stop during suspend
Avoid unnecessary copying of data when retrieving corrected monotonic time
Add the --enable-gettimeofday-as-os-system-time configure switch
Conflicts:
OTP_VERSION
erts/vsn.mk
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* maint-18:
Updated OTP version
Prepare release
Fix calculation of end time
Prefer monotonic time that stop during suspend
Avoid unnecessary copying of data when retrieving corrected monotonic time
Add the --enable-gettimeofday-as-os-system-time configure switch
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* rickard/end-time-fix/OTP-12896:
Fix calculation of end time
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* rickard/monotonic-clock-source/OTP-12895:
Prefer monotonic time that stop during suspend
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* rickard/read_corrected_time/OTP-12894:
Avoid unnecessary copying of data when retrieving corrected monotonic time
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* rickard/gettimeofday/OTP-12892:
Add the --enable-gettimeofday-as-os-system-time configure switch
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* rickard/trace-file-eintr-bug/OTP-12890:
Handle EINTR in trace_file_drv
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* rickard/non-smp-trace-port-exit-bug/OTP-12889:
Teach non-smp VM how to deal with trace port crash
Test case testing crash in tracer port
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* maint:
wx: Add event callback fastpath
wx: Event callbacks could hang wx application temporary
wx: Make wxLANGUAGE_ variable
wx: Send wxWdigets assert to error logger
wx: Add mouse_capture_lost event
wx: Fix code generator
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* dgud/wx/send-asserts-to-erl:
wx: Add event callback fastpath
wx: Event callbacks could hang wx application temporary
wx: Make wxLANGUAGE_ variable
wx: Send wxWdigets assert to error logger
wx: Add mouse_capture_lost event
wx: Fix code generator
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Forces usage of gettimeofday() for OS system time
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Conflicts:
OTP_VERSION
erts/doc/src/notes.xml
erts/vsn.mk
lib/runtime_tools/doc/src/notes.xml
lib/runtime_tools/vsn.mk
otp_versions.table
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Avoids spawn but can deadlock
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* bjorn/erts/clang-opt: (27 commits)
Improve unpacking performance on x86_64
Slightly tweak the peformance for get_list
Speed up list matching
Eliminate the variable temp_bits at the top scope of process_main()
Eliminate prefetch for conditional instructions
Teach beam_makeops to pack operands for move3 and move_window
Ensure that the move_call_ext_{last,only} instructions are used
beam_makeops: Eliminate unnecessary masking when packing 3 operands
Use a cheaper tag scheme for 'd' operands
Introduce swap_temp/3 and swap/2
Introduce specialized versions of move2
Add back frequently used x(0) instructions
Rewrite the hipe_mode_switch instructions
Remove the last use of tmp_arg1
Eliminate use of tmp_arg1 and tmp_arg2 in bit syntax
Remove the i_fetch instruction
Eliminate use of i_fetch for bit syntax instructions
Eliminate the use of i_fetch for BIF instructions
Eliminate the use of i_fetch for relational operators
Eliminate the use of i_fetch in arithmetic instructions
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* rickard/trace-file-eintr-bug/OTP-12890:
Handle EINTR in trace_file_drv
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* rickard/non-smp-trace-port-exit-bug/OTP-12889:
Teach non-smp VM how to deal with trace port crash
Test case testing crash in tracer port
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When unpacking operands on 64-bit CPUs, use a smarter mask to
help the compiler optimize the code.
It turns out that on x86_64, if we use the mask 0xFFFFUL (selecting
the 16 least significant bits), the compiler can combine a move and
a mask operation into the single insruction 'movzwl', which will
eliminate one instruction.
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Fetch the head and tail parts to temporary variables before
writing them to their destinations. That should allow the CPU to
perform the moves in parallel, which might improve performance.
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The combination is_non_empty_list followed by get_list is extremly
common (but not in estone_SUITE, which is why it has not been noticed
before). Therefore it is worthwile to introduce a combined
instruction.
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Not pre-fetching in conditional instructions (instructions that use
-fail_action) seems to improve performance slightly.
The reason for that is that conditional instructions may jump to the
failure label, wasting the pre-fetched instruction. Another reason
is that that many conditional instructions do a function call, and
the register pressure is therefore high. Avoiding the pre-fetch
may reduce the register pressure and pontentially result in more
efficient code.
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* maint:
ssh: be more generous about disconnect expects
ssh: add disjunction to ssh_trpt_test_lib:match
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* hans/ssh/no_common_algs/OTP-11531:
ssh: be more generous about disconnect expects
ssh: add disjunction to ssh_trpt_test_lib:match
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It is currently only possible to pack up to 4 operands. However,
the move_window4 instrucion has 5 operands and move_window5 and
move3 instrucations have 6 operands.
Teach beam_makeops to pack instructions with 5 or 6 operands.
Also rewrite the move_window instructions in beam_emu.c to macros
to allow their operands to get packed.
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Update transformations to ensure that the move_call_ext_last
and move_call_ext_last are used.
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When packing 3 operands into one word, there would be an unnecessary
mask operation when extracting the last operand.
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Since 'd' operands can only either an X register or an Y register,
we only need a single bit to distinguish them. Furthermore, we can
pre-multiply the register number with the word size to speed up
address calculation.
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Sequences of three move instructionst that effectively swap the
contents of two registers are fairly common. We can replace them
with a swap_temp/3 instruction. The third operand is the temporary
register to be used for swapping, since the temporary register
may actually be used.
If swap_temp/3 instruction is followed by a call, the temporary
register will often (but not always) be killed by the call. If
it is killed, we can replace the swap_temp/3 instruction with a
slightly cheaper swap/2 instruction.
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Currently, move2/2 does the two moves sequentially to ensure
that the instruction will always work correctly.
We can do better than that. If the two move instructions have
any registers in common, we can introduce simpler and slightly
more efficient instructions to handle those cases:
move_shift/3
move_dup/3
For the remaining cases when the the move instructions
have no common registers, the move2/4 instruction can perform
the moves in parallel which is probably slightly more efficient.
For clarity's sake, we will remain the instruction to move2_par/4.
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