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* sverk/bif-args/OTP-9662:
erts,hipe: Limited support for hipe cross compilation
erts-hipe: Change THE_NON_VALUE for HiPE enabled debug emulator
erts-hipe: Enable debug compiled hipe-VM with lock checker
erts-hipe: Rename fail_bif_interface_0 to standard_bif_interface_0
erts-hipe: Deliberate leak of native fun entries
erts-hipe: Fix new trap conventions for x86, amd64 and ppc
Store the trap address in p->i
Store the trap arguments in the X register array
erts-hipe: Make some primops use new BIF calling convention
erts-hipe: Adapt generated BIF wrappers for new calling convention
erts-hipe: Remove obscuring macros in generated assembler code
erts-hipe: Make hipe enabled emulator compile with new BIF calls
Simplify the instructions for calling BIFs
Change the calling convention for BIFs
Use the proper macros in all BIFs
Conflicts:
erts/emulator/beam/bif.h
erts/emulator/beam/erl_bif_info.c
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A future release of the compiler might want to treat external
funs as literals. Make sure that the loader can cope with an
export entry being created from both an entry in the literal
pool and from the export table (i.e. if an external fun refers
to an exported function in the same module).
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Make it clear for the user what has happened and how to fix it when
an attempt is made to load a BEAM file containing new instructions
that the current run-time system cannot handle.
Suggested-by: Thomas Lindgren
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This is a workaround as hipe code upgrade/unloading does not work properly.
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As a preparation for changing the calling convention for
BIFs, make sure that all BIFs use the macros. Also, eliminate
all calls from one BIF to another, since that also breaks
the calling convention abstraction.
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Each gc_bif[123] instruction must have both a transformation in
ops.tab and special code in gen_guard_bif[123]().
Rewrite it to do most of the work in gen_guard_bif[123]().
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In the handling of generic instructions, we used to always
test whether the instruction was 'too_old_compiler' and abort
loading with a special error message.
Refactor the code so that we only do test if we an error
has occurred. That will allow us to make the test more expensive
in the future, allowing us to customize error messages for certain
opcode without any cost in the successful case.
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'store_var' is always followed by 'next_arg'.
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'next_instr' is always followed by 'is_op'.
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Since the 'new_instr' instruction always occurs before the
'store_op' instruction, we can merge the instructions into one.
Also, there is no need to include the arity of the BEAM
instruction as an operand, since the arity can be looked up
based on the opcode.
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A 'call' instruction in the loader transformation language is
always followed by an 'end' instruction, so we can replace the
'call' instruction with a 'call_end' instruction.
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If the left part of a transformation will always match, omit the
the 'try_me_else' and 'fail' instructions.
As part of this optimization, make it an error to have a
transformation that can never be reached because of a previous
transformation that will always match. (Remove one transformation
from ops.tab that was found to be unreachable.)
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* dev:
Prevent valgrind warning for erts_alloc_permanent_cache_aligned
[erts] Fix memory leak in erts_make_stub_module (hipe loading)
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Code area allocation was done twice; first in read_code_header()
and then in erts_make_stub_module() itself.
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As a preparation for providing information about the source
location for an MFA item in an exception stacktrace, refactor
the code that builds the exception stacktrace. Basically we
need two passes over the saved continuation counters: a first
pass to calculate the needed heap space and a second pass to
actually build the stacktrace.
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Introduce the line/1 instruction in the compiler and the BEAM
virtual machine. It will not yet be generated by the compiler and
will not actually carry any information.
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Constructing binaries using the bit syntax with literals sizes
that would not fit in an Uint will either cause an emulator crash
or the loading to be aborted.
Use the new TAG_o tag introduced in the previous commit to make sure
that the attempt to create huge binary literals will generate a
system_limit exception at run-time.
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The handling of large values for other tags than TAG_i (integer) is
buggy. Any tag value equal to or greater than 2^40 (5 bytes) will
abort loading. Tag values fitting in 5 bytes will be truncated to 4
bytes values.
Those bugs cause real problems because the bs_init2/6 and
bs_init_bits/6 instructions unfortunately use TAG_u to encode literal
sizes (using TAG_i would have been a better choice, but it is too late
to change that now). Any binary size that cannot fit in an Uint
should cause a system_limit exception at run-time, but instead the
buggy handling will either cause an emulator crash (for values in the
range 2^32 to 2^40-1) or abort loading.
In this commit, implement overflow checking of tag values as a
preparation for fixing the binary construction instructions. If any
tag value cannot fit in an Uint (except for TAG_i), change the
tag to the special TAG_o overflow tag.
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* ta/erts-unused-vars:
erts: Remove unused variables
OTP-9205
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For some historical reason, the transformation of a func_info/3
instruction to the internal i_func_info/4 instruction is more
involved than it needs to be. Remove the gen_func_info() function
in the loader and use a simple transformation.
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While at it, clean up indentation of CHKBLK() macros.
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Introduce a new i_increment/4 to optimize the addition of
a register and a small integer. This instruction saves two
instruction words compared to the standard instructions
(an i_fetch/2 instruction followed by a i_plus/3 instruction)
and will also be slightly faster.
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The new instruction will save one word (because no size operand
is needed), and is slightly faster.
Handle select_tuple_arity in the same way.
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Use separate instructions for each register type.
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Use separate instructions for each register type.
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Instead of having one i_select_val_sfI instruction that uses
the GetArg1() macro to fetch the controlling expression, use
three separate instructions for each of the register types.
That will save one word when selecting on the {x,0} register.
It should also be slightly faster since a conditional branch
is eliminated.
Although it seems that the BEAM compiler will never generate
a constant controlling expression (even with optimizations
turned off), we still make sure that they will work by
evaluating the select_val instruction at load time.
Handle the select_tuple_arity instruction in the same way.
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The compiler does not generate select_val instructions that only
selects one value, but the loader may previously have created such
an instruction when it splitted a select_val instruction that
selected on bignums.
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Combine the put_tuple/2 and all following put/1 instructions
to one i_put_tuple/2 instruction. In general, that will reduce
the number of instruction words by 50 percent.
Measurements seem to indicate that the speed is about the same.
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In many (not all) cases, the value for the 'I' type will
fit into 32 bits.
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Introduce a new 'Q' type, similar to 'P' except that it
can be packed.
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In the 32-bit BEAM emulator, it is only possible to pack
3 register operands into one word. Therefore, the move2
instruction (that has 4 operands) needs two words for its
operands.
Take advantage of the larger wordsize in the 64-bit emulator
and pack up to 4 operands into a single word.
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In the transformation engine in the loader, an is_eq/1 instruction
is currently always preceded by an is_type/1 instruction. Therefore,
save a word and slight amount of time by combining those
instructions into an is_type_eq/2 instruction.
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It would only really work in simple case like:
select_val S=q Fail=f Size=u Rest=* => ...
where all operands for a single instruction where bound to
variables, and not for more complicated cases such as:
i_put_tuple Dst Arity Puts=* | put PutSrc => ...
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There was a version of the BEAM loader and emulator that
had two versions of the fmove/2 instruction, one version
that allocated heap space internally and a newer version that
assumed that a previous test_heap/2 instruction had already
allocated the heap space.
Though the allocating fmove/2 instruction is no longer
supported, some vestiges of it still remains.
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* pg/fix-segfault-on-crash_dump-with-hipe:
Fix segmentation fault when dumping the crash log with hipe enabled and natively compiled modules
OTP-8801
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natively compiled modules
When loading a module, code area is allocated and header fields
code[MI_ATTR_SIZE] as well as code[MI_COMPILE_SIZE] are not
cleared. They are only set later when freeze_code is called, if the
module has attributes and compilation info, which should always be the
case. When loading a native module (as a stub), code is allocated as
well (to contain the stub functions), and code[MI_ATTR_SIZE] as well
as code[MI_COMPILE_SIZE] are not cleared either. Yet, freeze_code will
not be called (since there is no threaded code to freeze for native
modules), and as a result, these header fields are never set. They can
contain any garbage.
Later on, when writing a crash dump, the attributes and compilation
info are dumped, using these particular header fields. If the size is
garbage, the dump attribute function will iterate until it segfaults.
The fix consists in clearing code[MI_ATTR_SIZE] and
code[MI_COMPILE_SIZE] in both cases (threaded code and native
code). Even if non-native modules should contain code and attributes
and therefore the values code[MI_ATTR_SIZE] and code[MI_COMPILE_SIZE]
should be set by freeze_code, it seems cleaner and easier to maintain
to clear the whole the header in the "initialize code area"
section. As a result, crash dump will not segfault. Instead, native
modules will have an empty attributes and compilation info section in
the crash dump.
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As the overhead counter got larger and never really was needed in ets objects,
I removed them.
A few stray comments of XXX:PaN type from halfword dev removed in the process.
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put_literal/2 was an experimental instruction added in R11 to
support literals, but before the R12 release support for literals
was implemented for all instruction, making the put_literal/2
instruction redundant. Although the beam_disasm module supports
dissambley of instructions in older releases, there is
no reason to have it support experimental instructions.
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Add the gc_bif's to the VM.
Add infrastructure for gc_bif's (guard bifs that can gc) with two and.
three arguments in VM (loader and VM).
Add compiler support for gc_bif with three arguments.
Add compiler (and interpreter) support for new guard BIFs.
Add testcases for new guard BIFs in compiler and emulator.
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Since R14 does not need to load code that can also be loaded
in an R11 run-time system, support for the put_string/3
instruction can be removed.
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* pan/otp_8332_halfword:
Teach testcase in driver_suite the new prototype for driver_async
wx: Correct usage of driver callbacks from wx thread
Adopt the new (R13B04) Nif functionality to the halfword codebase
Support monitoring and demonitoring from driver threads
Fix further test-suite problems
Correct the VM to work for more test suites
Teach {wordsize,internal|external} to system_info/1
Make tracing and distribution work
Turn on instruction packing in the loader and virtual machine
Add the BeamInstr data type for loaded BEAM code
Fix the BEAM dissambler for the half-word emulator
Store pointers to heap data in 32-bit words
Add a custom mmap wrapper to force heaps into the lower address range
Fit all heap data into the 32-bit address range
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