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Calls to erlang:set_trace_pattern/3 will no longer block all
other schedulers.
We will still go to single-scheduler mode when new code is loaded
for a module that is traced, or when loading code when there is a
default trace pattern set. That is not impossible to fix, but that
requires much closer cooperation between tracing BIFs and the loader
BIFs.
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Change the data structures for breakpoints to make it possible
(in a future commit) to manage breakpoints without taking down the
system to single-scheduling mode.
The current "breakpoint wheel" data structure (a circular,
double-linked list of breakpoints) was invented before the
SMP emulator. To support it in the SMP emulator, there is essentially
one breakpoint wheel per scheduler. As more breakpoint types have
been added, the implementation has become messy and hard to understand
and maintain.
Therefore, the time for a rewrite has come. Use one struct to hold
all breakpoint data for a breakpoint in a function. Use a flag field
to indicate what different type of break actions that are enabled.
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Conflicts:
erts/emulator/beam/beam_emu.c
erts/emulator/beam/bif.tab
erts/preloaded/ebin/prim_file.beam
lib/hipe/cerl/erl_bif_types.erl
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It is wrongly assumed in the BEAM loader that apply/2 is a BIF
and must be treated specially. Also make it clearer in ops.tab
that apply/3 is a BIF, but apply/2 is not.
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Taking advantage of the new calling convention for BIFs, we
only need one instruction to handle BIFs with any number of
arguments. This change eliminates the limit of three arguments
for BIFs, but traps are still limited to three arguments.
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Each gc_bif[123] instruction must have both a transformation in
ops.tab and special code in gen_guard_bif[123]().
Rewrite it to do most of the work in gen_guard_bif[123]().
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In the handling of generic instructions, we used to always
test whether the instruction was 'too_old_compiler' and abort
loading with a special error message.
Refactor the code so that we only do test if we an error
has occurred. That will allow us to make the test more expensive
in the future, allowing us to customize error messages for certain
opcode without any cost in the successful case.
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We don't need type constraints that essentially are assertions;
the wrong type will be detected and loading aborted when no specific
instruction can be found.
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If the left part of a transformation will always match, omit the
the 'try_me_else' and 'fail' instructions.
As part of this optimization, make it an error to have a
transformation that can never be reached because of a previous
transformation that will always match. (Remove one transformation
from ops.tab that was found to be unreachable.)
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is_list/2 and other test instructions with a zero label was last
generated by the v1 BEAM compiler which was last supported in R6B.
Since BEAM modules produced by that compiler will be rejected with
a nice error message for other reasons (e.g. by the test for the
module_info/0,1 functions), retaining those transformations serves
no useful purpose.
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The hybrid-heap emulator is broken since R12, so there is no
need to keep those instructions.
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Ancient versions of BEAM compiler could generate move instruction with
the same source and destination registers, so the loader would optimize
away such instructions.
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Introduce the line/1 instruction in the compiler and the BEAM
virtual machine. It will not yet be generated by the compiler and
will not actually carry any information.
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Constructing binaries using the bit syntax with literals sizes
that would not fit in an Uint will either cause an emulator crash
or the loading to be aborted.
Use the new TAG_o tag introduced in the previous commit to make sure
that the attempt to create huge binary literals will generate a
system_limit exception at run-time.
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For some historical reason, the transformation of a func_info/3
instruction to the internal i_func_info/4 instruction is more
involved than it needs to be. Remove the gen_func_info() function
in the loader and use a simple transformation.
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Frequency counts show that
move Const x(1)
move Const x(2)
are very common.
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That will save one word and small amount of time for
each occurrence.
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The is_eq_exact/3 and is_ne_exact/3 instructions are commonly used
with one immediate or literal operand.
Introduce three new specialized instructions:
i_is_eq_exact_literal/3
i_is_ne_exact_immed/3
i_is_ne_exact_literal/3
The i_is_ne_exact_literal/3 instruction is not very frequently
used, but its existence is justified because we removed in a
a previous commit the special instruction for matching bignums
and we now use i_is_ne_exact_literal/3 instead.
For consistency, rename the existing is_eq_immed/3 instruction to
is_eq_exact_immed/3.
While at it, remove the optimization of an is_eq/3 instruction
with an immediate operand because that optimization is already
done by the compiler.
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Introduce a new i_increment/4 to optimize the addition of
a register and a small integer. This instruction saves two
instruction words compared to the standard instructions
(an i_fetch/2 instruction followed by a i_plus/3 instruction)
and will also be slightly faster.
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The new instruction will save one word (because no size operand
is needed), and is slightly faster.
Handle select_tuple_arity in the same way.
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Since the literal (constant) pool was introduced in R12, the
BEAM compiler will never generate a "put_list Const [] Dst"
instruction (it will instead generate a "move [Const] Dst"
instruction).
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The move_sd specific instruction is no longer used since there
are specific move instructions covering all possible permutations
of operands. Also eliminate the move_cy instruction because it
is almost never generated by the compiler.
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Create separate instructions for each register type. The "badmatch x(0)"
and "case_end x(0)" (which are very common) will only require a single
word each, compared to two words when GetArg1() is used.
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Use separate instructions for each register type.
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Use separate instructions for each register type.
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Instead of having one i_select_val_sfI instruction that uses
the GetArg1() macro to fetch the controlling expression, use
three separate instructions for each of the register types.
That will save one word when selecting on the {x,0} register.
It should also be slightly faster since a conditional branch
is eliminated.
Although it seems that the BEAM compiler will never generate
a constant controlling expression (even with optimizations
turned off), we still make sure that they will work by
evaluating the select_val instruction at load time.
Handle the select_tuple_arity instruction in the same way.
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Combine the put_tuple/2 and all following put/1 instructions
to one i_put_tuple/2 instruction. In general, that will reduce
the number of instruction words by 50 percent.
Measurements seem to indicate that the speed is about the same.
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Introduce a new 'Q' type, similar to 'P' except that it
can be packed.
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There was a version of the BEAM loader and emulator that
had two versions of the fmove/2 instruction, one version
that allocated heap space internally and a newer version that
assumed that a previous test_heap/2 instruction had already
allocated the heap space.
Though the allocating fmove/2 instruction is no longer
supported, some vestiges of it still remains.
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Without the instruction defined in ops the interpreter will not
compile when using NO_JUMPTABLE.
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Initial commit with a new breakpoint instruction and PSD areas
for temporary time storage during tracing.
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The last compiler to generate code that uses the bs_bits_to_bytes/3
instruction was the R11 compiler. Since we don't support loading
R11 *.beam files in R14, removing the remaining support for the
instruction.
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Since R12B, empty tuples are literals. Thus the compiler will no
longer generate the instruction:
put_tuple 0 Destination
for creating an empty tuple. It is now time to stop supporting
that instruction in the run-time system.
While we are at it, correct a typo.
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Add the gc_bif's to the VM.
Add infrastructure for gc_bif's (guard bifs that can gc) with two and.
three arguments in VM (loader and VM).
Add compiler support for gc_bif with three arguments.
Add compiler (and interpreter) support for new guard BIFs.
Add testcases for new guard BIFs in compiler and emulator.
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The recv_mark/1 instruction will both save the current
position in the message queue and a mark (the address of the
loop_rec/2 instruction just following the recv_set/1
instruction). The recv_mark/1 instruction will only
use the saved position if the mark is correct.
The reason for saving and verifying the mark is that
the compiler does not need to guarantee that no other
receive instruction can be executed in between the
recv_mark/1 and recv_set/1 instructions (the mark will
be cleared by the remove_message/0 instruction when a message
is removed from the message queue). That means that arbitrary
function calls in between those instruction can be allowed.
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Make the recv_mark/1 and recv_mark/1 instructions known to the
compiler and run-time system. For the moment, make the loader ignore
any occurrences of those instructions in BEAM files.
Also update hipe_beam_to_icode to ignore those instructions.
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The following program is supposed to cause an exception
at run-time:
foo() ->
Sum1 = Sum2 = N = 2,
pSum - (Sum1*(Sum2/N)).
but the loader fails to load because it contains the
following instruction:
fconv {atom,pSum} {fr,2}
Fix the loader so that it can handle fconv instructions
where the first operand is a non-numeric literal.
Reported-by: Torbjörn Törnkvist
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