Age | Commit message (Collapse) | Author |
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erts/emulator/hipe/hipe_arm.c started out as a clone of hipe_ppc.c,
with #ifdefs to select ARM-specific code. Somehow those #ifdefs
never got cleaned out, resulting in fairly ugly-looking code.
This eliminates the #ifdefs, deletes dead PowerPC-specific code, and
keeps only the ARM-specific code. I've verified that the exact same
assembly code is generated for hipe_arm.c before and after this patch
(if you compile without -g, with -g there are unavoidable changes to
the debug data).
Signed-off-by: Mikael Pettersson <[email protected]>
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Bug introduced in R15.
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* maint:
Remove stale code for hybrid heap and incremental GC
Remove the hipe_bifs:show_message_area/0 BIF
Remove support for erlang:system_info(global_heaps_size)
Remove the erlang:garbage_collect_message_area/0 BIF
Remove workarounds for hybrid and shared heaps in test suites
Conflicts:
erts/doc/src/erlang.xml
erts/emulator/beam/erl_message.c
erts/emulator/beam/erl_process.c
erts/emulator/beam/erl_process.h
erts/emulator/hipe/hipe_bif2.tab
lib/hipe/cerl/erl_bif_types.erl
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The hybrid heap emulator was last working in the non-SMP R11B
run-time system. When the constant pools were introduced in R12B,
the hybrid heap emulator was not updated to handle them.
At this point, the harm from reduced readability of the code is
greater than any potential usefulness of keeping the code.
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* rickard/proc-sched/OTP-9892:
Teach etp-commands to understand new emulator internal data structures
Optimize process state changes
Optimize process table access
Implement possibility to use ordinary mutexes as process locks
Conflicts:
erts/emulator/beam/erl_alloc.types
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* sverk/threadsafe-code-loading: (59 commits)
erts: Fix assert failure when code_server exits "during" commit
erts: Fix memory leak in code loading
erts: Adapt gdb etp-command for new beam_ranges
erts: Set correct default tracing when loading code
erts: Fix faulty assert in non-smp debug vm
erts: Use correct macro for "yield-return"
erts: Refactor code loading with renaming
erts: Seize code_ix lock when updating trace settings
erts: Switch order between code_ix lock and thread blocking
erts: Fix race bug in finish_after_on_load
erts: Refactor export staging lock
erts: Activate staged code in a thread safe way
erts: Suspend processes waiting for code_ix lock
erts: Fix compiler warning in inet_drv
erts: Fix single threaded fallback in new BIF finish_loading_1
erts: Fix type bug
Break apart erlang:load_module/2 into two separate BIFs
Use magic binaries in erts_prepare_loading() and erts_finish_loading()
erts: Cleanup non-blocking load
erts: Fix memory query for non-blocking module table
...
OTP-9974
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Staging is a better and more general name as does not necessary need
to involve code loading (can be deletion, tracing, etc).
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Still blocking code loading
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* sverk/hipe-hibernate-sparc-bug:
erts: Make GC tolerate hibernated process without hipe stack
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Seen causing segv on sparc with hibernate_native_SUITE:basic:
nstack_walk_frame_ra (nsp=0x0, sdesc=0x6c8f2c) at hipe_risc_gc.h:105
gensweep_nstack (p=0x6a6930, ptr_old_htop=0xffbfea50, ptr_n_htop=0xffbfea4c) at hipe/hipe_gc.c:224
do_minor (p=0x6a6930, new_sz=233, objv=0x6a6984, nobj=3) at beam/erl_gc.c:949
minor_collection (p=0x6a6930, need=3, objv=0x6a6984, nobj=3, recl=0xffbfece4) at beam/erl_gc.c:811
erts_garbage_collect (p=0x6a6930, need=3, objv=0x6a6984, nobj=3) at beam/erl_gc.c:379
erts_send_message (sender=0x6a6048, receiver=0x6a6930, receiver_locks=0xffbfedf8, message=6132762, flags=0) at beam/erl_message.c:922
do_send (p=0x6a6048, to=515, msg=6132762, suspend=1) at beam/bif.c:2052
erl_send (p=0x6a6048, to=515, msg=6132762) at beam/bif.c:2151
send_2 (A__p=0x6a6048, BIF__ARGS=0x6a609c) at beam/bif.c:2146
nbif_send_2 ()
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Fixes alignment warning from ld on 64bit platforms with gcc 4.6.1
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* sverk/ppc-hibernate-fix:
erts: Fix hipe bug in hibernate on PowerPC
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Can still not setup -a, but cerl works.
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Seems to apply to Sparc and ARM as well (even if not observed).
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* rickard/alloc-opt/OTP-7775:
Optimize memory allocation
Conflicts:
erts/aclocal.m4
erts/emulator/hipe/hipe_bif_list.m4
erts/preloaded/ebin/erl_prim_loader.beam
erts/preloaded/ebin/erlang.beam
erts/preloaded/ebin/init.beam
erts/preloaded/ebin/otp_ring0.beam
erts/preloaded/ebin/prim_file.beam
erts/preloaded/ebin/prim_inet.beam
erts/preloaded/ebin/prim_zip.beam
erts/preloaded/ebin/zlib.beam
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A number of memory allocation optimizations have been implemented. Most
optimizations reduce contention caused by synchronization between
threads during allocation and deallocation of memory. Most notably:
* Synchronization of memory management in scheduler specific allocator
instances has been rewritten to use lock-free synchronization.
* Synchronization of memory management in scheduler specific
pre-allocators has been rewritten to use lock-free synchronization.
* The 'mseg_alloc' memory segment allocator now use scheduler specific
instances instead of one instance. Apart from reducing contention
this also ensures that memory allocators always create memory
segments on the local NUMA node on a NUMA system.
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Normally hipe assumes that generated native code will be executed
on the same emulator as the hipe compiler is running on.
This commit allows you to build a hipe "cross-compiler"
for a different configured emulator (but for same architecture).
Example:
> cd lib/hipe
> make clean
> make XCOMP=yes FLAVOR=smp TYPE=debug
This hipe compiler will generate code to be executed
on the debug compiled smp-emulator at $ERL_TOP.
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This is a work-around as there are hipe BIFs that return untagged
integers that may be intepreted as THE_NON_VALUE (24).
Hipe bifs that return offsets as untagged integers:
hipe_bs_put_utf8
hipe_bs_put_utf16be
hipe_bs_put_utf16le
Hipe bifs that return raw pointers:
hipe_find_na_or_make_stub
hipe_nonclosure_address
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Add hipe_debug_bif_wrapper() as a wrapper for every BIF
called by native code.
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These primops use the standard_bif_interface_X macros in
hipe_bif_list.m4 and must therefor be implemented as bifs for things to work.
Maybe there is room for optimization here to call the primops more directly
with arguments in registers without having to push them on stack to emulate
bif calls.
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x86 and amd64: Push BIF__ARGS array on C-stack.
ppc, sparc and arm: Write BIF__ARGS array to P->def_arg_reg[]
Just the simplest solution with limited assembler knowledge,
probably room for improvements.
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No semantic change.
Just easier to debug when jumps are spelled out
and not obscured by yet another layer of macros.
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A first step to adapt hipe to the new BIF calling convention.
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Conflicts:
erts/aclocal.m4
erts/emulator/beam/erl_db.c
erts/emulator/sys/win32/sys.c
erts/include/internal/ethread_header_config.h.in
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In the half-word emulator, smp emulator, and non-smp emulator
the X register and float register arrays were allocated in
different ways.
Always allocate the registers and store the pointers to the
allocated register arrays in the scheduler data.
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This commit is a preparation for introducing location information
(filename/line number) in stacktraces in exceptions. Currently
a stack trace looks like:
[{Mod1,Function1,Arity1},
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{ModN,FunctionN,ArityN}]
Add a forth element to each tuple that can be used indication
the filename and line number of the source file:
[{Mod1,Function1,Arity1,Location1},
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{ModN,FunctionN,ArityN,LocationN}]
In this commit, the fourth element will just be an empty list,
and we will change all code that look at or manipulate stacktraces.
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* pg/fix-hibernate-scheduling-with-hipe:
Fix bug related to hibernate and HiPE (clear F_HIBERNATE_SCHED flag)
OTP-9452
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All uses of the old deprecated atomic API in the runtime system
have been replaced with the use of the new atomic API. In a lot of
places this change imply a relaxation of memory barriers used.
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F_HIBERNATE_SCHED flag that was introduced in b7ecdcd1ae9e11b8f75e must
be cleared in hipe_mode_switch as well. Otherwise, processes running
HiPE code that hibernate, wake up and then trap into a BIF will not be
rescheduled.
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