Age | Commit message (Collapse) | Author |
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Conflicts:
OTP_VERSION
erts/vsn.mk
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* maint:
erts: Make sure to unlock status lock when setting process prio
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* lukas/erts/process_priority_unlock/OTP-12943:
erts: Make sure to unlock status lock when setting process prio
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* vinoski/stderr-eagain/OTP-12942:
Handle ERRNO_BLOCK in fd_driver async functions
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Several users on erlang-questions have reported problems with recent
releases where output to standard_error causes standard_error_sup to
die from receiving an unexpected eagain error. In the fd_driver,
change the fd_async() function to handle EINTR, and change
fd_ready_async() to handle ERRNO_BLOCK. Add a new test to
standard_error_SUITE to generate output to standard_error and ensure
that standard_error_sup does not die. Thanks to Kota Uenishi for
contributing the test case.
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* maint:
erts: Don't abort when a system process is terminated
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* lukas/erts/system_process_core/OTP-12934:
erts: Don't abort when a system process is terminated
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* maint:
Teach smp VM how to deal with crash of a linked trace port
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* sverk/smp-trace-port-exit-bug/OTP-12901:
Teach smp VM how to deal with crash of a linked trace port
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Problem: The sys-msg-dispather crashes the VM when trying to send
exit signals from the links of the terminating trace port.
If try-lock of the linked process fails, a pending exit is
scheduled and erts_scheduler_data() is then called to find
"my" run queue. But sys-msg-dispatcher is not a scheduler
and has no scheduler data, hence SEGV.
Fix: If not a scheduler and we cannot get process locks,
schedule process in its previous run-queue.
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* maint:
Fix crash when disassembling modules with BIFs
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* bjorn/erts/beam_debug:
Fix crash when disassembling modules with BIFs
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* lukas/ose/remove/OTP-12573:
Remove OSE from erl_interface
ose: Remove all code related to the OSE port
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The OSE port is no longer supported and this commit removed it
and any changes related to it. The things that were general
improvements have been left in the code.
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* maint:
Updated OTP version
Prepare release
Fix calculation of end time
Prefer monotonic time that stop during suspend
Avoid unnecessary copying of data when retrieving corrected monotonic time
Add the --enable-gettimeofday-as-os-system-time configure switch
Conflicts:
OTP_VERSION
erts/vsn.mk
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* maint-18:
Updated OTP version
Prepare release
Fix calculation of end time
Prefer monotonic time that stop during suspend
Avoid unnecessary copying of data when retrieving corrected monotonic time
Add the --enable-gettimeofday-as-os-system-time configure switch
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* rickard/end-time-fix/OTP-12896:
Fix calculation of end time
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* rickard/monotonic-clock-source/OTP-12895:
Prefer monotonic time that stop during suspend
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* rickard/read_corrected_time/OTP-12894:
Avoid unnecessary copying of data when retrieving corrected monotonic time
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* rickard/gettimeofday/OTP-12892:
Add the --enable-gettimeofday-as-os-system-time configure switch
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* rickard/non-smp-trace-port-exit-bug/OTP-12889:
Teach non-smp VM how to deal with trace port crash
Test case testing crash in tracer port
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In a debug-compiled emulator, running erts_debug:df(io) would
trigger an assertion failure:
1> erts_debug:df(io).
beam/beam_debug.c:301:erts_debug_disassemble_1() Assertion failed: (((funcinfo[0]) & 0x3F) == ((0x0 << 4) | ((0x2 << 2) | 0x3)))
Aborted (core dumped)
It turns out that the assertion is wrong. It should have been
updated in 64ccd8c9b7a7 which made it possible to have stubs for
BIFs in the BEAM code for a module. The faulty assertion was only
found when when 16317f73f79265 added a smoke test of the BEAM
disassembler.
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Forces usage of gettimeofday() for OS system time
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Conflicts:
OTP_VERSION
erts/doc/src/notes.xml
erts/vsn.mk
lib/runtime_tools/doc/src/notes.xml
lib/runtime_tools/vsn.mk
otp_versions.table
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* rickard/non-smp-trace-port-exit-bug/OTP-12889:
Teach non-smp VM how to deal with trace port crash
Test case testing crash in tracer port
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When unpacking operands on 64-bit CPUs, use a smarter mask to
help the compiler optimize the code.
It turns out that on x86_64, if we use the mask 0xFFFFUL (selecting
the 16 least significant bits), the compiler can combine a move and
a mask operation into the single insruction 'movzwl', which will
eliminate one instruction.
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Fetch the head and tail parts to temporary variables before
writing them to their destinations. That should allow the CPU to
perform the moves in parallel, which might improve performance.
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The combination is_non_empty_list followed by get_list is extremly
common (but not in estone_SUITE, which is why it has not been noticed
before). Therefore it is worthwile to introduce a combined
instruction.
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Not pre-fetching in conditional instructions (instructions that use
-fail_action) seems to improve performance slightly.
The reason for that is that conditional instructions may jump to the
failure label, wasting the pre-fetched instruction. Another reason
is that that many conditional instructions do a function call, and
the register pressure is therefore high. Avoiding the pre-fetch
may reduce the register pressure and pontentially result in more
efficient code.
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It is currently only possible to pack up to 4 operands. However,
the move_window4 instrucion has 5 operands and move_window5 and
move3 instrucations have 6 operands.
Teach beam_makeops to pack instructions with 5 or 6 operands.
Also rewrite the move_window instructions in beam_emu.c to macros
to allow their operands to get packed.
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Update transformations to ensure that the move_call_ext_last
and move_call_ext_last are used.
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When packing 3 operands into one word, there would be an unnecessary
mask operation when extracting the last operand.
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Since 'd' operands can only either an X register or an Y register,
we only need a single bit to distinguish them. Furthermore, we can
pre-multiply the register number with the word size to speed up
address calculation.
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Sequences of three move instructionst that effectively swap the
contents of two registers are fairly common. We can replace them
with a swap_temp/3 instruction. The third operand is the temporary
register to be used for swapping, since the temporary register
may actually be used.
If swap_temp/3 instruction is followed by a call, the temporary
register will often (but not always) be killed by the call. If
it is killed, we can replace the swap_temp/3 instruction with a
slightly cheaper swap/2 instruction.
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Currently, move2/2 does the two moves sequentially to ensure
that the instruction will always work correctly.
We can do better than that. If the two move instructions have
any registers in common, we can introduce simpler and slightly
more efficient instructions to handle those cases:
move_shift/3
move_dup/3
For the remaining cases when the the move instructions
have no common registers, the move2/4 instruction can perform
the moves in parallel which is probably slightly more efficient.
For clarity's sake, we will remain the instruction to move2_par/4.
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