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2017-03-16hipe: Add pseudo_spill_f?move instructionsMagnus Lång
These pseudo instructions are added to all backends and allow spill slot to spill slot move coalescing in a clean way. They have regular move semantics, but contain an additional scratch register to be used if both source and destination are spilled, and can not be move coalesced. Additionally, a register allocator callback Target:is_spill_move(Instr, Context) is added which allows the spill slot allocators to check for these instructions and try to coalesce the spill slots the two temporaries are allocated to.
2017-03-16hipe: Add branch prediction accessor ra callbacksMagnus Lång
Adds a new register allocator callback Target:branch_preds(Instr, Context) which, for a control flow instruction Instr, returns a list of tuples {Target, Probability} for each label name Target that Instr may branch to. Probability is a float between 0.0 and 1.0 and corresponds to the predicted probability that control flow branches to the corresponding target. The probabilities may sum to at most 1.0 (rounding errors aside). Note that a sum less than 1.0 is valid.
2017-03-16hipe: Add basic range splitting ra callbacksMagnus Lång
In addition to the temporary name rewriting that hipe_regalloc_prepass does, range splitters also need to be able to insert move instructions, as well as inserting new basic blocks in the control flow graph. The following four callbacks are added for that purpose: * Target:mk_move(Src, Dst, Context) Returns a move instruction from the temporary (not just register number) Src to Dst. * Target:mk_goto(Label, Context) Returns a unconditional control flow instruction that branches to the label with name Label. * Target:redirect_jmp(Instr, ToOld, ToNew, Context) Modifies the control flow instruction Instr so that any control flow that would go to a label with name ToOld instead goes to the label with name ToNew. * Target:new_label(Context) Returns a fresh label name that does not belong to any existing block in the current function, and is to be used to create a new basic block in the control flow graph by calling Target:update_bb/4 with this new name.
2016-11-23Correct copyright on remaining hipe filesRichard Carlsson
2016-09-05hipe: Refactor ra callbacks to accept context argMagnus Lång
This allows us to pass around the context data that hipe_regalloc_prepass needs cleanly, without using process dictionary or parameterised modules (like it was previous to this change).
2016-09-02hipe_sparc: Add code rewrite RA callbacksMagnus Lång
These will not only be useful for hipe_regalloc_prepass, but also, after the introduction of a mk_move/2 (or similar) callback, for the purpose of range splitting. Since the substitution needed to case over all the instructions, a new module, hipe_sparc_subst, was introduced to the sparc backend.
2016-09-02hipe: Remove defun_to_cfg/1 RA callbackMagnus Lång
Now that all backends do register allocation on a CFG directly and define the defun_to_cfg/1 callback as the identity function, it can be removed.
2016-09-02hipe: Add hipe_regalloc_prepassMagnus Lång
hipe_regalloc_prepass speeds up register allocation by spilling any temp that is live over a call (which clobbers all register). In order to detect these, a new function was added to the target interface; defines_all_alloc/1, that takes an instruction and returns a boolean.
2016-08-30hipe_sparc: Minimise CFG<->linear conversionsMagnus Lång
Now, there will only ever be a single Linear->CFG conversion, just after lowering from RTL, and only ever a single CFG->Linear conversion, just before the finalise pass. Both of these now happen in hipe_sparc_main.
2016-03-15update copyright-yearHenrik Nord
2015-06-18Change license text to APLv2Bruce Yinhe
2009-11-20The R13B03 release.OTP_R13B03Erlang/OTP