Merge branch 'rickard/thread-queue-fix/OTP-10854' into rickard/r16b/thread-queue-fix/OTP-10854

Conflicts:
	erts/emulator/beam/erl_threads.h

1 files changed, 82 insertions, 0 deletions

diff --git a/erts/emulator/beam/erl_threads.h b/erts/emulator/beam/erl_threads.h
index 1dc3ffeb3c..594d38b2a1 100644
--- a/erts/emulator/beam/erl_threads.h
+++ b/erts/emulator/beam/erl_threads.h
@@ -690,6 +690,19 @@ do {									\
 } while (0)
 #endif
 
+ERTS_GLB_INLINE void
+erts_dw_atomic_set_dirty(erts_dw_atomic_t *var, erts_dw_aint_t *val);
+ERTS_GLB_INLINE void
+erts_dw_atomic_read_dirty(erts_dw_atomic_t *var, erts_dw_aint_t *val);
+ERTS_GLB_INLINE void
+erts_atomic_set_dirty(erts_atomic_t *var, erts_aint_t val);
+ERTS_GLB_INLINE erts_aint_t
+erts_atomic_read_dirty(erts_atomic_t *var);
+ERTS_GLB_INLINE void
+erts_atomic32_set_dirty(erts_atomic32_t *var, erts_aint32_t val);
+ERTS_GLB_INLINE erts_aint32_t
+erts_atomic32_read_dirty(erts_atomic32_t *var);
+
 /*
  * See "Documentation of atomics and memory barriers" at the top
  * of this file for info on atomics.
@@ -732,6 +745,26 @@ do {									\
 #define erts_dw_atomic_read_wb ethr_dw_atomic_read_wb
 #define erts_dw_atomic_cmpxchg_wb ethr_dw_atomic_cmpxchg_wb
 
+#if ERTS_GLB_INLINE_INCL_FUNC_DEF
+
+ERTS_GLB_INLINE void
+erts_dw_atomic_set_dirty(erts_dw_atomic_t *var, erts_dw_aint_t *val)
+{
+    ethr_sint_t *sint = ethr_dw_atomic_addr(var);
+    sint[0] = val->sint[0];
+    sint[1] = val->sint[1];    
+}
+
+ERTS_GLB_INLINE void
+erts_dw_atomic_read_dirty(erts_dw_atomic_t *var, erts_dw_aint_t *val)
+{
+    ethr_sint_t *sint = ethr_dw_atomic_addr(var);
+    val->sint[0] = sint[0];
+    val->sint[1] = sint[1];
+}
+
+#endif
+
 /* Word size atomics */
 
 #define erts_atomic_init_nob ethr_atomic_init
@@ -911,6 +944,7 @@ erts_atomic_read_bset_rb(erts_atomic_t *var,
 #define erts_atomic_cmpxchg_wb ethr_atomic_cmpxchg_wb
 
 #if ERTS_GLB_INLINE_INCL_FUNC_DEF
+
 ERTS_GLB_INLINE erts_aint_t
 erts_atomic_read_bset_wb(erts_atomic_t *var,
 			 erts_aint_t mask,
@@ -921,6 +955,25 @@ erts_atomic_read_bset_wb(erts_atomic_t *var,
 			    ethr_atomic_cmpxchg_wb,
 			    var, mask, set);
 }
+
+#endif
+
+#if ERTS_GLB_INLINE_INCL_FUNC_DEF
+
+ERTS_GLB_INLINE void
+erts_atomic_set_dirty(erts_atomic_t *var, erts_aint_t val)
+{
+    ethr_sint_t *sint = ethr_atomic_addr(var);
+    *sint = val;
+}
+
+ERTS_GLB_INLINE erts_aint_t
+erts_atomic_read_dirty(erts_atomic_t *var)
+{
+    ethr_sint_t *sint = ethr_atomic_addr(var);
+    return *sint;
+}
+
 #endif
 
 /* 32-bit atomics */
@@ -1102,6 +1155,7 @@ erts_atomic32_read_bset_rb(erts_atomic32_t *var,
 #define erts_atomic32_cmpxchg_wb ethr_atomic32_cmpxchg_wb
 
 #if ERTS_GLB_INLINE_INCL_FUNC_DEF
+
 ERTS_GLB_INLINE erts_aint32_t
 erts_atomic32_read_bset_wb(erts_atomic32_t *var,
 			   erts_aint32_t mask,
@@ -1112,10 +1166,29 @@ erts_atomic32_read_bset_wb(erts_atomic32_t *var,
 			    ethr_atomic32_cmpxchg_wb,
 			    var, mask, set);
 }
+
 #endif
 
 #undef ERTS_ATOMIC_BSET_IMPL__
 
+#if ERTS_GLB_INLINE_INCL_FUNC_DEF
+
+ERTS_GLB_INLINE void
+erts_atomic32_set_dirty(erts_atomic32_t *var, erts_aint32_t val)
+{
+    ethr_sint32_t *sint = ethr_atomic32_addr(var);
+    *sint = val;
+}
+
+ERTS_GLB_INLINE erts_aint32_t
+erts_atomic32_read_dirty(erts_atomic32_t *var)
+{
+    ethr_sint32_t *sint = ethr_atomic32_addr(var);
+    return *sint;
+}
+
+#endif
+
 #else /* !USE_THREADS */
 
 /* Double word size atomics */
@@ -1155,6 +1228,9 @@ erts_atomic32_read_bset_wb(erts_atomic32_t *var,
 #define erts_dw_atomic_read_wb erts_no_dw_atomic_read
 #define erts_dw_atomic_cmpxchg_wb erts_no_dw_atomic_cmpxchg
 
+#define erts_dw_atomic_set_dirty erts_no_dw_atomic_set
+#define erts_dw_atomic_read_dirty erts_no_dw_atomic_read
+
 /* Word size atomics */
 
 #define erts_atomic_init_nob erts_no_atomic_set
@@ -1262,6 +1338,9 @@ erts_atomic32_read_bset_wb(erts_atomic32_t *var,
 #define erts_atomic_cmpxchg_wb erts_no_atomic_cmpxchg
 #define erts_atomic_read_bset_wb erts_no_atomic_read_bset
 
+#define erts_atomic_set_dirty erts_no_atomic_set
+#define erts_atomic_read_dirty erts_no_atomic_read
+
 /* 32-bit atomics */
 
 #define erts_atomic32_init_nob erts_no_atomic32_set
@@ -1369,6 +1448,9 @@ erts_atomic32_read_bset_wb(erts_atomic32_t *var,
 #define erts_atomic32_cmpxchg_wb erts_no_atomic32_cmpxchg
 #define erts_atomic32_read_bset_wb erts_no_atomic32_read_bset
 
+#define erts_atomic32_set_dirty erts_no_atomic32_set
+#define erts_atomic32_read_dirty erts_no_atomic32_read
+
 #endif /* !USE_THREADS */
 
 #if ERTS_GLB_INLINE_INCL_FUNC_DEF