Don't run unsafe compiler passes

As a preparation for replacing v3_codegen with a new code generator,
remove unsafe optimization passes. Especially the older compiler
passes have implicit assumptions about how the code is generated.

Remove the optimizations in beam_block (keep the code that creates
blocks) because they are unsafe. beam_block also calls
beam_utils:live_opt/1, which is unsafe.

Remove beam_type because it calls beam_utils:live_opt/1, and also
because it recalculates the number of heaps words and number of live
registers in allocation instructions, thus potentially hiding bugs in
other passes.

Remove beam_receive because it is unsafe.

Remove beam_record because it is the only remaining user
of beam_utils:anno_defs/1.

Remove beam_reorder because it makes much more sense to run it
as an early SSA-based optimization pass.

Remove the now unused functions in beam_utils:

    anno_def/1
    delete_annos/1
    is_killed_block/2
    live_opt/1
    usage/3

Note that the following test cases will fail because of the
removed optimizations:

    compile_SUITE:optimized_guards/1
    compile_SUITE:bc_options/1
    receive_SUITE:ref_opt/1

1 files changed, 3 insertions, 558 deletions

diff --git a/lib/compiler/src/beam_utils.erl b/lib/compiler/src/beam_utils.erl
index 317252e87a..af1e719206 100644
--- a/lib/compiler/src/beam_utils.erl
+++ b/lib/compiler/src/beam_utils.erl
@@ -21,18 +21,16 @@
 %% 
 
 -module(beam_utils).
--export([is_killed_block/2,is_killed/3,is_killed_at/3,
-	 is_not_used/3,usage/3,
+-export([is_killed/3,is_killed_at/3,is_not_used/3,
 	 empty_label_index/0,index_label/3,index_labels/1,replace_labels/4,
 	 code_at/2,bif_to_test/3,is_pure_test/1,
-	 live_opt/1,delete_annos/1,combine_heap_needs/2,
-         anno_defs/1,
+	 combine_heap_needs/2,
 	 split_even/1
         ]).
 
 -export_type([code_index/0,module_code/0,instruction/0]).
 
--import(lists, [flatmap/2,map/2,member/2,sort/1,reverse/1,splitwith/2]).
+-import(lists, [flatmap/2,map/2,member/2,sort/1,reverse/1]).
 
 -define(is_const(Val), (Val =:= nil orelse
                         element(1, Val) =:= integer orelse
@@ -62,46 +60,6 @@
 	{lbl :: code_index(),            %Label to code index.
 	 res :: result_cache()}).        %Result cache for each label.
 
-%% usage(Register, [Instruction], State) -> killed|not_used|used.
-%%  Determine the usage of Register in the instruction sequence.
-%%  The return value is one of:
-%%
-%%  killed   - The register is not used in any way.
-%%  not_used - The register is referenced only by an allocating instruction
-%%             (the actual value does not matter).
-%%  used     - The register is used (its value do matter).
-
--spec usage(beam_asm:reg(), [instruction()], code_index()) ->
-  'killed' | 'not_used' | 'used'.
-
-usage(R, Is, D) ->
-    St = #live{lbl=D,res=gb_trees:empty()},
-    {Usage,_} = check_liveness(R, Is, St),
-    Usage.
-
-
-%% is_killed_block(Register, [Instruction]) -> true|false
-%%  Determine whether a register is killed by the instruction sequence inside
-%%  a block.
-%%
-%%  If true is returned, it means that the register will not be
-%%  referenced in ANY way (not even indirectly by an allocate instruction);
-%%  i.e. it is OK to enter the instruction sequence with Register
-%%  containing garbage.
-
--spec is_killed_block(beam_asm:reg(), [instruction()]) -> boolean().
-
-is_killed_block({x,X}, [{set,_,_,{alloc,Live,_}}|_]) ->
-    X >= Live;
-is_killed_block(R, [{set,Ds,Ss,_Op}|Is]) ->
-    not member(R, Ss) andalso (member(R, Ds) orelse is_killed_block(R, Is));
-is_killed_block(R, [{'%anno',{used,Regs}}|Is]) ->
-    case R of
-	{x,X} when (Regs bsr X) band 1 =:= 0 -> true;
-	_ -> is_killed_block(R, Is)
-    end;
-is_killed_block(_, []) -> false.
-
 %% is_killed(Register, [Instruction], State) -> true|false
 %%  Determine whether a register is killed by the instruction sequence.
 %%  If true is returned, it means that the register will not be
@@ -261,42 +219,6 @@ is_pure_test({test,is_function2,_,[_,_]}) -> true;
 is_pure_test({test,Op,_,Ops}) -> 
     erl_internal:new_type_test(Op, length(Ops)).
 
-    
-%% live_opt([Instruction]) -> [Instruction].
-%%  Go through the instruction sequence in reverse execution
-%%  order, keep track of liveness and remove 'move' instructions
-%%  whose destination is a register that will not be used.
-%%  Also insert {used,Regs} annotations at the beginning
-%%  and end of each block.
-
--spec live_opt([instruction()]) -> [instruction()].
-
-live_opt(Is0) ->
-    {[{label,Fail}|_]=Bef,[Fi|Is]} =
-	splitwith(fun({func_info,_,_,_}) -> false;
-		     (_) -> true
-		  end, Is0),
-    {func_info,_,_,Live} = Fi,
-    D = gb_trees:insert(Fail, live_call(Live), gb_trees:empty()),
-    Bef ++ [Fi|live_opt(reverse(Is), 0, D, [])].
-
-
-%% delete_annos([Instruction]) -> [Instruction].
-%%  Delete all annotations.
-
--spec delete_annos([instruction()]) -> [instruction()].
-
-delete_annos([{block,Bl0}|Is]) ->
-    case delete_annos(Bl0) of
-	[] -> delete_annos(Is);
-	[_|_]=Bl -> [{block,Bl}|delete_annos(Is)]
-    end;
-delete_annos([{'%anno',_}|Is]) ->
-    delete_annos(Is);
-delete_annos([I|Is]) ->
-    [I|delete_annos(Is)];
-delete_annos([]) -> [].
-
 %% combine_heap_needs(HeapNeed1, HeapNeed2) -> HeapNeed
 %%  Combine the heap need for two allocation instructions.
 
@@ -310,24 +232,6 @@ combine_heap_needs(H1, H2) when is_integer(H1), is_integer(H2) ->
 combine_heap_needs(H1, H2) ->
     {alloc,combine_alloc_lists([H1,H2])}.
 
-
-%% anno_defs(Instructions) -> Instructions'
-%%  Add {def,RegisterBitmap} annotations to the beginning of
-%%  each block.  Iff bit X is set in the the bitmap, it means
-%%  that {x,X} is defined when the block is entered.
-
--spec anno_defs([instruction()]) -> [instruction()].
-
-anno_defs(Is0) ->
-    {Bef,[Fi|Is1]} =
-	splitwith(fun({func_info,_,_,_}) -> false;
-		     (_) -> true
-		  end, Is0),
-    {func_info,_,_,Arity} = Fi,
-    Regs = init_def_regs(Arity),
-    Is = defs(Is1, Regs, #{}),
-    Bef ++ [Fi|Is].
-
 %% split_even/1
 %% [1,2,3,4,5,6] -> {[1,3,5],[2,4,6]}
 
@@ -846,466 +750,7 @@ combine_alloc_lists(Al0) ->
 
 %% live_opt/4.
 
-%% Bit syntax instructions.
-live_opt([{bs_context_to_binary,Src}=I|Is], Regs0, D, Acc) ->
-    Regs = x_live([Src], Regs0),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{bs_init,Fail,_,none,Ss,Dst}=I|Is], Regs0, D, Acc) ->
-    Regs1 = x_live(Ss, x_dead([Dst], Regs0)),
-    Regs = live_join_label(Fail, D, Regs1),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{bs_init,Fail,Info,Live0,Ss,Dst}|Is], Regs0, D, Acc) ->
-    Regs1 = x_dead([Dst], Regs0),
-    Live = live_regs(Regs1),
-    true = Live =< Live0,	%Assertion.
-    Regs2 = live_call(Live),
-    Regs3 = x_live(Ss, Regs2),
-    Regs = live_join_label(Fail, D, Regs3),
-    I = {bs_init,Fail,Info,Live,Ss,Dst},
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{bs_put,Fail,_,Ss}=I|Is], Regs0, D, Acc) ->
-    Regs1 = x_live(Ss, Regs0),
-    Regs = live_join_label(Fail, D, Regs1),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{bs_restore2,Src,_}=I|Is], Regs0, D, Acc) ->
-    Regs = x_live([Src], Regs0),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{bs_save2,Src,_}=I|Is], Regs0, D, Acc) ->
-    Regs = x_live([Src], Regs0),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{test,bs_start_match2,Fail,Live,[Src,_],_}=I|Is], _, D, Acc) ->
-    Regs0 = live_call(Live),
-    Regs1 = x_live([Src], Regs0),
-    Regs = live_join_label(Fail, D, Regs1),
-    live_opt(Is, Regs, D, [I|Acc]);
-
-%% Other instructions.
-live_opt([{block,Bl0}|Is], Regs0, D, Acc) ->
-    Live0 = make_anno({used,Regs0}),
-    {Bl,Regs} = live_opt_block(reverse(Bl0), Regs0, D, [Live0]),
-    Live = make_anno({used,Regs}),
-    live_opt(Is, Regs, D, [{block,[Live|Bl]}|Acc]);
-live_opt([build_stacktrace=I|Is], _, D, Acc) ->
-    live_opt(Is, live_call(1), D, [I|Acc]);
-live_opt([raw_raise=I|Is], _, D, Acc) ->
-    live_opt(Is, live_call(3), D, [I|Acc]);
-live_opt([{label,L}=I|Is], Regs, D0, Acc) ->
-    D = gb_trees:insert(L, Regs, D0),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{jump,{f,L}}=I|Is], _, D, Acc) ->
-    Regs = gb_trees:get(L, D),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([return=I|Is], _, D, Acc) ->
-    live_opt(Is, 1, D, [I|Acc]);
-live_opt([{catch_end,_}=I|Is], _, D, Acc) ->
-    live_opt(Is, live_call(1), D, [I|Acc]);
-live_opt([{badmatch,Src}=I|Is], _, D, Acc) ->
-    Regs = x_live([Src], 0),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{case_end,Src}=I|Is], _, D, Acc) ->
-    Regs = x_live([Src], 0),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{try_case_end,Src}=I|Is], _, D, Acc) ->
-    Regs = x_live([Src], 0),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([if_end=I|Is], _, D, Acc) ->
-    Regs = 0,
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{call,Arity,_}=I|Is], _, D, Acc) ->
-    live_opt(Is, live_call(Arity), D, [I|Acc]);
-live_opt([{call_ext,Arity,_}=I|Is], _, D, Acc) ->
-    live_opt(Is, live_call(Arity), D, [I|Acc]);
-live_opt([{call_fun,Arity}=I|Is], _, D, Acc) ->
-    live_opt(Is, live_call(Arity+1), D, [I|Acc]);
-live_opt([{apply,Arity}=I|Is], _, D, Acc) ->
-    live_opt(Is, live_call(Arity+2), D, [I|Acc]);
-live_opt([{make_fun2,_,_,_,Arity}=I|Is], _, D, Acc) ->
-    live_opt(Is, live_call(Arity), D, [I|Acc]);
-live_opt([{test,_,Fail,Ss}=I|Is], Regs0, D, Acc) ->
-    Regs1 = x_live(Ss, Regs0),
-    Regs = live_join_label(Fail, D, Regs1),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{test,_,Fail,Live,Ss,_}=I|Is], _, D, Acc) ->
-    Regs0 = live_call(Live),
-    Regs1 = x_live(Ss, Regs0),
-    Regs = live_join_label(Fail, D, Regs1),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{select,_,Src,Fail,List}=I|Is], _, D, Acc) ->
-    Regs0 = 0,
-    Regs1 = x_live([Src], Regs0),
-    Regs = live_join_labels([Fail|List], D, Regs1),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{try_case,Y}=I|Is], Regs0, D, Acc) ->
-    Regs = live_call(1),
-    case Regs0 of
-        0 ->
-            live_opt(Is, Regs, D, [{try_end,Y}|Acc]);
-        _ ->
-            live_opt(Is, live_call(1), D, [I|Acc])
-    end;
-live_opt([{loop_rec,_Fail,_Dst}=I|Is], _, D, Acc) ->
-    live_opt(Is, 0, D, [I|Acc]);
-live_opt([timeout=I|Is], _, D, Acc) ->
-    live_opt(Is, 0, D, [I|Acc]);
-live_opt([{wait,_}=I|Is], _, D, Acc) ->
-    live_opt(Is, 0, D, [I|Acc]);
-live_opt([{get_map_elements,Fail,Src,{list,List}}=I|Is], Regs0, D, Acc) ->
-    {Ss,Ds} = split_even(List),
-    Regs1 = x_live([Src|Ss], x_dead(Ds, Regs0)),
-    Regs = live_join_label(Fail, D, Regs1),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{gc_bif,N,F,R,As,Dst}=I|Is], Regs0, D, Acc) ->
-    Bl = [{set,[Dst],As,{alloc,R,{gc_bif,N,F}}}],
-    {_,Regs} = live_opt_block(Bl, Regs0, D, []),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{bif,N,F,As,Dst}=I|Is], Regs0, D, Acc) ->
-    Bl = [{set,[Dst],As,{bif,N,F}}],
-    {_,Regs} = live_opt_block(Bl, Regs0, D, []),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{get_tuple_element,Src,Idx,Dst}=I|Is], Regs0, D, Acc) ->
-    Bl = [{set,[Dst],[Src],{get_tuple_element,Idx}}],
-    {_,Regs} = live_opt_block(Bl, Regs0, D, []),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{move,Src,Dst}=I|Is], Regs0, D, Acc) ->
-    Regs = x_live([Src], x_dead([Dst], Regs0)),
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{put_map,F,Op,S,Dst,R,{list,Puts}}=I|Is], Regs0, D, Acc) ->
-    Bl = [{set,[Dst],[S|Puts],{alloc,R,{put_map,Op,F}}}],
-    {_,Regs} = live_opt_block(Bl, Regs0, D, []),
-    live_opt(Is, Regs, D, [I|Acc]);
-
-%% Transparent instructions - they neither use nor modify x registers.
-live_opt([{deallocate,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{kill,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{try_end,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{loop_rec_end,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{wait_timeout,_,nil}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{wait_timeout,_,{Tag,_}}=I|Is], Regs, D, Acc) when Tag =/= x ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{line,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{'catch',_,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{'try',_,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-
-%% The following instructions can occur if the "compilation" has been
-%% started from a .S file using the 'from_asm' option.
-live_opt([{trim,_,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{'%',_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{recv_set,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-live_opt([{recv_mark,_}=I|Is], Regs, D, Acc) ->
-    live_opt(Is, Regs, D, [I|Acc]);
-
-live_opt([], _, _, Acc) -> Acc.
-
-live_opt_block([{set,[{x,X}]=Ds,Ss,move}=I|Is], Regs0, D, Acc) ->
-    Regs = x_live(Ss, x_dead(Ds, Regs0)),
-    case is_live(X, Regs0) of
-        true ->
-            live_opt_block(Is, Regs, D, [I|Acc]);
-        false ->
-            %% Useless move, will never be used.
-            live_opt_block(Is, Regs, D, Acc)
-    end;
-live_opt_block([{set,Ds,Ss,{alloc,Live0,AllocOp}}|Is], Regs0, D, Acc) ->
-    %% Calculate liveness from the point of view of the GC.
-    %% There will never be a GC if the instruction fails, so we should
-    %% ignore the failure branch.
-    GcRegs1 = x_dead(Ds, Regs0),
-    GcRegs = x_live(Ss, GcRegs1),
-    Live = live_regs(GcRegs),
-
-    %% The life-time analysis used by the code generator is sometimes too
-    %% conservative, so it may be possible to lower the number of live
-    %% registers based on the exact liveness information. The main benefit is
-    %% that more optimizations that depend on liveness information (such as the
-    %% beam_dead pass) may be applied.
-    true = Live =< Live0,                       %Assertion.
-    I = {set,Ds,Ss,{alloc,Live,AllocOp}},
-
-    %% Calculate liveness from the point of view of the preceding instruction.
-    %% The liveness is the union of live registers in the GC and the live
-    %% registers at the failure label.
-    Regs1 = live_call(Live),
-    Regs = live_join_alloc(AllocOp, D, Regs1),
-    live_opt_block(Is, Regs, D, [I|Acc]);
-live_opt_block([{set,Ds,Ss,{bif,_,Fail}}=I|Is], Regs0, D, Acc) ->
-    Regs1 = x_dead(Ds, Regs0),
-    Regs2 = x_live(Ss, Regs1),
-    Regs = live_join_label(Fail, D, Regs2),
-    live_opt_block(Is, Regs, D, [I|Acc]);
-live_opt_block([{set,Ds,Ss,_}=I|Is], Regs0, D, Acc) ->
-    Regs = x_live(Ss, x_dead(Ds, Regs0)),
-    live_opt_block(Is, Regs, D, [I|Acc]);
-live_opt_block([{'%anno',_}|Is], Regs, D, Acc) ->
-    live_opt_block(Is, Regs, D, Acc);
-live_opt_block([], Regs, _, Acc) -> {Acc,Regs}.
-
-live_join_alloc({Kind,_Name,Fail}, D, Regs) when Kind =:= gc_bif; Kind =:= put_map ->
-    live_join_label(Fail, D, Regs);
-live_join_alloc(_, _, Regs) -> Regs.
-
-live_join_labels([{f,L}|T], D, Regs0) when L =/= 0 ->
-    Regs = gb_trees:get(L, D) bor Regs0,
-    live_join_labels(T, D, Regs);
-live_join_labels([_|T], D, Regs) ->
-    live_join_labels(T, D, Regs);
-live_join_labels([], _, Regs) -> Regs.
-
-live_join_label({f,0}, _, Regs) ->
-    Regs;
-live_join_label({f,L}, D, Regs) ->
-    gb_trees:get(L, D) bor Regs.
-
-live_call(Live) -> (1 bsl Live) - 1.
-
-live_regs(Regs) ->
-    live_regs_1(0, Regs).
-
-live_regs_1(N, 0) -> N;
-live_regs_1(N, Regs) -> live_regs_1(N+1, Regs bsr 1).
-
-x_dead([{x,N}|Rs], Regs) -> x_dead(Rs, Regs band (bnot (1 bsl N)));
-x_dead([_|Rs], Regs) -> x_dead(Rs, Regs);
-x_dead([], Regs) -> Regs.
-
-x_live([{x,N}|Rs], Regs) -> x_live(Rs, Regs bor (1 bsl N));
-x_live([_|Rs], Regs) -> x_live(Rs, Regs);
-x_live([], Regs) -> Regs.
-
-is_live(X, Regs) -> ((Regs bsr X) band 1) =:= 1.
-
 split_even([], Ss, Ds) ->
     {reverse(Ss),reverse(Ds)};
 split_even([S,D|Rs], Ss, Ds) ->
     split_even(Rs, [S|Ss], [D|Ds]).
-
-%%%
-%%% Add annotations for defined registers.
-%%%
-%%% This analysis is done by scanning the instructions in
-%%% execution order.
-%%%
-
-defs([{apply,_}=I|Is], _Regs, D) ->
-    [I|defs(Is, 1, D)];
-defs([{bif,_,{f,Fail},_Src,Dst}=I|Is], Regs0, D) ->
-    Regs = def_regs([Dst], Regs0),
-    [I|defs(Is, Regs, update_regs(Fail, Regs0, D))];
-defs([{block,Block0}|Is], Regs0, D0) ->
-    {Block,Regs,D} = defs_list(Block0, Regs0, D0),
-    [{block,[make_anno({def,Regs0})|Block]}|defs(Is, Regs, D)];
-defs([{bs_init,{f,L},_,Live,_,Dst}=I|Is], Regs0, D) ->
-    Regs1 = case Live of
-                none -> Regs0;
-                _ -> init_def_regs(Live)
-            end,
-    Regs = def_regs([Dst], Regs1),
-    [I|defs(Is, Regs, update_regs(L, Regs, D))];
-defs([{bs_put,{f,L},_,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, update_regs(L, Regs, D))];
-defs([build_stacktrace=I|Is], _Regs, D) ->
-    [I|defs(Is, 1, D)];
-defs([{call,_,_}=I|Is], _Regs, D) ->
-    [I|defs(Is, 1, D)];
-defs([{call_ext,_,{extfunc,M,F,A}}=I|Is], _Regs, D) ->
-    case erl_bifs:is_exit_bif(M, F, A) of
-        false ->
-            [I|defs(Is, 1, D)];
-        true ->
-            [I|defs_unreachable(Is, D)]
-    end;
-defs([{call_ext,_,_}=I|Is], _Regs, D) ->
-    [I|defs(Is, 1, D)];
-defs([{call_fun,_}=I|Is], _Regs, D) ->
-    [I|defs(Is, 1, D)];
-defs([{'catch',_,{f,L}}=I|Is], Regs, D) ->
-    RegsAtLabel = init_def_regs(1),
-    [I|defs(Is, Regs, update_regs(L, RegsAtLabel, D))];
-defs([{catch_end,_}=I|Is], _Regs, D) ->
-    Regs = init_def_regs(1),
-    [I|defs(Is, Regs, D)];
-defs([{gc_bif,_,{f,Fail},Live,_Src,Dst}=I|Is], Regs0, D) ->
-    true = all_defined(Live, Regs0),            %Assertion.
-    Regs = def_regs([Dst], init_def_regs(Live)),
-    [I|defs(Is, Regs, update_regs(Fail, Regs0, D))];
-defs([{get_map_elements,{f,L},_Src,{list,DstList}}=I|Is], Regs0, D) ->
-    {_,Ds} = beam_utils:split_even(DstList),
-    Regs = def_regs(Ds, Regs0),
-    [I|defs(Is, Regs, update_regs(L, Regs0, D))];
-defs([{get_tuple_element,_,_,Dst}=I|Is], Regs0, D) ->
-    Regs = def_regs([Dst], Regs0),
-    [I|defs(Is, Regs, D)];
-defs([{jump,{f,L}}=I|Is], Regs, D) ->
-    [I|defs_unreachable(Is, update_regs(L, Regs, D))];
-defs([{label,L}=I|Is], Regs0, D) ->
-    case D of
-        #{L:=Regs1} ->
-            Regs = Regs0 band Regs1,
-            [I|defs(Is, Regs, D)];
-        #{} ->
-            [I|defs(Is, Regs0, D)]
-    end;
-defs([{loop_rec,{f,L},{x,0}}=I|Is], _Regs, D0) ->
-    RegsAtLabel = init_def_regs(0),
-    D = update_regs(L, RegsAtLabel, D0),
-    [I|defs(Is, init_def_regs(1), D)];
-defs([{loop_rec_end,_}=I|Is], _Regs, D) ->
-    [I|defs_unreachable(Is, D)];
-defs([{make_fun2,_,_,_,_}=I|Is], _Regs, D) ->
-    [I|defs(Is, 1, D)];
-defs([{move,_,Dst}=I|Is], Regs0, D) ->
-    Regs = def_regs([Dst], Regs0),
-    [I|defs(Is, Regs, D)];
-defs([{put_map,{f,Fail},_,_,Dst,_,_}=I|Is], Regs0, D) ->
-    Regs = def_regs([Dst], Regs0),
-    [I|defs(Is, Regs, update_regs(Fail, Regs0, D))];
-defs([raw_raise=I|Is], _Regs, D) ->
-    [I|defs(Is, 1, D)];
-defs([return=I|Is], _Regs, D) ->
-    [I|defs_unreachable(Is, D)];
-defs([{select,_,_Src,Fail,List}=I|Is], Regs, D0) ->
-    D = update_list([Fail|List], Regs, D0),
-    [I|defs_unreachable(Is, D)];
-defs([{test,_,{f,L},_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, update_regs(L, Regs, D))];
-defs([{test,_,{f,L},Live,_,Dst}=I|Is], Regs0, D) ->
-    true = all_defined(Live, Regs0),             %Assertion.
-    Regs = def_regs([Dst], init_def_regs(Live)),
-    [I|defs(Is, Regs, update_regs(L, Regs0, D))];
-defs([{'try',_,{f,L}}=I|Is], Regs, D) ->
-    RegsAtLabel = init_def_regs(3),
-    [I|defs(Is, Regs, update_regs(L, RegsAtLabel, D))];
-defs([{try_case,_}=I|Is], _Regs, D) ->
-    [I|defs(Is, init_def_regs(3), D)];
-defs([{wait,_}=I|Is], _Regs, D) ->
-    [I|defs_unreachable(Is, D)];
-defs([{wait_timeout,_,_}=I|Is], _Regs, D) ->
-    [I|defs(Is, 0, D)];
-
-%% Exceptions.
-defs([{badmatch,_}=I|Is], _Regs, D) ->
-    [I|defs_unreachable(Is, D)];
-defs([{case_end,_}=I|Is], _Regs, D) ->
-    [I|defs_unreachable(Is, D)];
-defs([if_end=I|Is], _Regs, D) ->
-    [I|defs_unreachable(Is, D)];
-defs([{try_case_end,_}=I|Is], _Regs, D) ->
-    [I|defs_unreachable(Is, D)];
-
-%% Neutral instructions
-defs([{bs_context_to_binary,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{bs_restore2,_,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{bs_save2,_,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{deallocate,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{kill,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{line,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{recv_mark,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{recv_set,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([timeout=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{trim,_,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{try_end,_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([{'%',_}=I|Is], Regs, D) ->
-    [I|defs(Is, Regs, D)];
-defs([], _, _) -> [].
-
-defs_unreachable([{label,L}=I|Is], D) ->
-    case D of
-        #{L:=Regs} ->
-            [I|defs(Is, Regs, D)];
-        #{} ->
-            defs_unreachable(Is, D)
-    end;
-defs_unreachable([_|Is], D) ->
-    defs_unreachable(Is, D);
-defs_unreachable([], _D) -> [].
-
-defs_list(Is, Regs, D) ->
-    defs_list(Is, Regs, D, []).
-
-defs_list([{set,Ds,_,{alloc,Live,Info}}=I|Is], Regs0, D0, Acc) ->
-    true = all_defined(Live, Regs0),             %Assertion.
-    D = case Info of
-            {gc_bif,_,{f,Fail}} ->
-                update_regs(Fail, Regs0, D0);
-            {put_map,_,{f,Fail}} ->
-                update_regs(Fail, Regs0, D0);
-            _ ->
-                D0
-        end,
-    Regs = def_regs(Ds, init_def_regs(Live)),
-    defs_list(Is, Regs, D, [I|Acc]);
-defs_list([{set,Ds,_,Info}=I|Is], Regs0, D0, Acc) ->
-    D = case Info of
-            {bif,_,{f,Fail}} ->
-                update_regs(Fail, Regs0, D0);
-            {try_catch,'catch',{f,Fail}} ->
-                update_regs(Fail, init_def_regs(1), D0);
-            {try_catch,'try',{f,Fail}} ->
-                update_regs(Fail, init_def_regs(3), D0);
-            _ ->
-                D0
-        end,
-    Regs = def_regs(Ds, Regs0),
-    defs_list(Is, Regs, D, [I|Acc]);
-defs_list([], Regs, D, Acc) ->
-    {reverse(Acc),Regs,D}.
-
-init_def_regs(Arity) ->
-    (1 bsl Arity) - 1.
-
-def_regs([{x,X}|T], Regs) ->
-    def_regs(T, Regs bor (1 bsl X));
-def_regs([_|T], Regs) ->
-    def_regs(T, Regs);
-def_regs([], Regs) -> Regs.
-
-update_list([{f,L}|T], Regs, D0) ->
-    D = update_regs(L, Regs, D0),
-    update_list(T, Regs, D);
-update_list([_|T], Regs, D) ->
-    update_list(T, Regs, D);
-update_list([], _Regs, D) -> D.
-
-update_regs(L, Regs0, D) ->
-    case D of
-        #{L:=Regs1} ->
-            Regs = Regs0 band Regs1,
-            D#{L:=Regs};
-        #{} ->
-            D#{L=>Regs0}
-    end.
-
-all_defined(Live, Regs) ->
-    All = (1 bsl Live) - 1,
-    Regs band All =:= All.
-
-%%%
-%%% Utilities.
-%%%
-
-%% make_anno(Anno) -> WrappedAnno.
-%%  Wrap an annotation term.
-
-make_anno(Anno) ->
-    {'%anno',Anno}.