Merge branch 'bjorn/compiler/maps'

* bjorn/compiler/maps:
  v3_codegen: Teach the put_map_* instructions to reuse source registers
  beam_validator: Tighten tests of maps
  v3_core: Eliminate the sloppiness-encouraging get_ianno/1 function
  v3_core: Add is_map tests before map instructions
  beam_type: Use the complete register map when calculating liveness
  Introduce '%live' annotations with a complete register map
  beam_validator: Teach bif_type/3 and is_bif_safe/2 about is_map/1
  v3_core: Simplify conversion of map patterns

1 files changed, 10 insertions, 6 deletions

diff --git a/lib/compiler/src/v3_codegen.erl b/lib/compiler/src/v3_codegen.erl
index 8c1a0c08ac..cbe50b93b0 100644
--- a/lib/compiler/src/v3_codegen.erl
+++ b/lib/compiler/src/v3_codegen.erl
@@ -1523,9 +1523,11 @@ set_cg([{var,R}], {map,Op,Map,[{map_pair,{var,_}=K,V}]}, Le, Vdb, Bef,
     List = [cg_reg_arg(K,Int0),cg_reg_arg(V,Int0)],
 
     Live = max_reg(Bef#sr.reg),
-    Int1 = Int0#sr{reg=put_reg(R, Int0#sr.reg)},
-    Aft = clear_dead(Int1, Le#l.i, Vdb),
-    Target = fetch_reg(R, Int1#sr.reg),
+
+    %% The target register can reuse one of the source registers.
+    Aft0 = clear_dead(Int0, Le#l.i, Vdb),
+    Aft = Aft0#sr{reg=put_reg(R, Aft0#sr.reg)},
+    Target = fetch_reg(R, Aft#sr.reg),
 
     I = case Op of
 	assoc -> put_map_assoc;
@@ -1557,9 +1559,11 @@ set_cg([{var,R}], {map,Op,Map,Es}, Le, Vdb, Bef,
     List = flatmap(fun({K,V}) -> [K,cg_reg_arg(V,Int0)] end, Pairs),
 
     Live = max_reg(Bef#sr.reg),
-    Int1 = Int0#sr{reg=put_reg(R, Int0#sr.reg)},
-    Aft = clear_dead(Int1, Le#l.i, Vdb),
-    Target = fetch_reg(R, Int1#sr.reg),
+
+    %% The target register can reuse one of the source registers.
+    Aft0 = clear_dead(Int0, Le#l.i, Vdb),
+    Aft = Aft0#sr{reg=put_reg(R, Aft0#sr.reg)},
+    Target = fetch_reg(R, Aft#sr.reg),
 
     I = case Op of
 	assoc -> put_map_assoc;