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| author | Magnus Lång <[email protected]> | 2016-09-05 14:55:01 +0200 |
|---|---|---|
| committer | Magnus Lång <[email protected]> | 2016-09-05 19:17:50 +0200 |
| commit | ea710644b198f7800f0daf2de0d152cf8e3e9bb3 (patch) | |
| tree | 46842f5dab3fcdbb4055d11ee55c28506eeac7fc /lib/hipe/amd64/hipe_amd64_ra_sse2_postconditions.erl | |
| parent | 1039c0196a7e643c63ce71b2c6daa2b78b3aa832 (diff) | |
| download | otp-ea710644b198f7800f0daf2de0d152cf8e3e9bb3.tar.gz otp-ea710644b198f7800f0daf2de0d152cf8e3e9bb3.tar.bz2 otp-ea710644b198f7800f0daf2de0d152cf8e3e9bb3.zip | |
hipe: Refactor ra callbacks to accept context arg
This allows us to pass around the context data that
hipe_regalloc_prepass needs cleanly, without using process dictionary or
parameterised modules (like it was previous to this change).
Diffstat (limited to 'lib/hipe/amd64/hipe_amd64_ra_sse2_postconditions.erl')
| -rw-r--r-- | lib/hipe/amd64/hipe_amd64_ra_sse2_postconditions.erl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/hipe/amd64/hipe_amd64_ra_sse2_postconditions.erl b/lib/hipe/amd64/hipe_amd64_ra_sse2_postconditions.erl index a8b22595d1..d062c0b37c 100644 --- a/lib/hipe/amd64/hipe_amd64_ra_sse2_postconditions.erl +++ b/lib/hipe/amd64/hipe_amd64_ra_sse2_postconditions.erl @@ -34,7 +34,7 @@ check_and_rewrite(AMD64CFG, Coloring) -> check_and_rewrite(AMD64CFG, Coloring, Strategy) -> %%io:format("Converting\n"), - TempMap = hipe_temp_map:cols2tuple(Coloring,hipe_amd64_specific_sse2), + TempMap = hipe_temp_map:cols2tuple(Coloring,hipe_amd64_specific_sse2,no_context), %%io:format("Rewriting\n"), do_bbs(hipe_x86_cfg:labels(AMD64CFG), TempMap, Strategy, AMD64CFG, false). @@ -144,7 +144,7 @@ clone(Dst, Strategy) -> spill_temp(Type, 'normal') -> hipe_x86:mk_new_temp(Type); spill_temp(double, 'linearscan') -> - hipe_x86:mk_temp(hipe_amd64_specific_sse2:temp0(), double); + hipe_x86:mk_temp(hipe_amd64_specific_sse2:temp0(no_context), double); spill_temp(Type, 'linearscan') when Type =:= tagged; Type =/= untagged -> %% We can make a new temp here since we have yet to allocate registers for %% these types |