aboutsummaryrefslogtreecommitdiffstats
path: root/lib/hipe/amd64/hipe_amd64_sse2.erl
diff options
context:
space:
mode:
authorMagnus Lång <[email protected]>2016-03-12 01:22:45 +0100
committerMagnus Lång <[email protected]>2016-08-30 17:02:37 +0200
commitd93a42112b35e4dbfb0f34b413fffb543f15ca3e (patch)
tree1de60981f1c99cfc66fa7e911063f1cc4ee58679 /lib/hipe/amd64/hipe_amd64_sse2.erl
parent85234b4069c9b75e3ae5ddf643b981d7428fb81f (diff)
downloadotp-d93a42112b35e4dbfb0f34b413fffb543f15ca3e.tar.gz
otp-d93a42112b35e4dbfb0f34b413fffb543f15ca3e.tar.bz2
otp-d93a42112b35e4dbfb0f34b413fffb543f15ca3e.zip
hipe_x86: LSRA for SSE2
There is little point offering LSRA for x86 if we're still going to call hipe_graph_coloring_regalloc for the floats. In particular, all allocators except LSRA allocates an N^2 interference matrix, making them unusable for really large functions.
Diffstat (limited to 'lib/hipe/amd64/hipe_amd64_sse2.erl')
-rw-r--r--lib/hipe/amd64/hipe_amd64_sse2.erl79
1 files changed, 79 insertions, 0 deletions
diff --git a/lib/hipe/amd64/hipe_amd64_sse2.erl b/lib/hipe/amd64/hipe_amd64_sse2.erl
new file mode 100644
index 0000000000..df78941be5
--- /dev/null
+++ b/lib/hipe/amd64/hipe_amd64_sse2.erl
@@ -0,0 +1,79 @@
+%% -*- erlang-indent-level: 2 -*-
+%%
+%% %CopyrightBegin%
+%%
+%% Copyright Ericsson AB 2016. All Rights Reserved.
+%%
+%% Licensed under the Apache License, Version 2.0 (the "License");
+%% you may not use this file except in compliance with the License.
+%% You may obtain a copy of the License at
+%%
+%% http://www.apache.org/licenses/LICENSE-2.0
+%%
+%% Unless required by applicable law or agreed to in writing, software
+%% distributed under the License is distributed on an "AS IS" BASIS,
+%% WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+%% See the License for the specific language governing permissions and
+%% limitations under the License.
+%%
+%% %CopyrightEnd%
+%%
+%% Fix {mem, mem} floating point operations that result from linear scan
+%% allocated floats.
+
+-module(hipe_amd64_sse2).
+
+-export([map/1]).
+
+-include("../x86/hipe_x86.hrl").
+-include("../main/hipe.hrl").
+
+%%----------------------------------------------------------------------
+
+map(Defun = #defun{code=Code0}) ->
+ Code1 = do_insns(Code0, []),
+ Defun#defun{code=Code1}.
+
+do_insns([I|Insns], Accum) ->
+ NewIs = do_insn(I),
+ do_insns(Insns, lists:reverse(NewIs, Accum));
+do_insns([], Accum) ->
+ lists:reverse(Accum).
+
+do_insn(I) ->
+ case I of
+ #fp_binop{} -> do_fp_binop(I);
+ #fmove{} -> do_fmove(I);
+ _ -> [I]
+ end.
+
+do_fp_binop(I = #fp_binop{src=Src0,dst=Dst}) ->
+ {FixSrc, Src} = fix_binary(Src0, Dst),
+ FixSrc ++ [I#fp_binop{src=Src}].
+
+do_fmove(I = #fmove{src=Src0,dst=Dst}) ->
+ {FixSrc, Src} = fix_binary(Src0, Dst),
+ FixSrc ++ [I#fmove{src=Src}].
+
+fix_binary(Src0, Dst) ->
+ case is_mem_opnd(Src0) of
+ false -> {[], Src0};
+ true ->
+ case is_mem_opnd(Dst) of
+ false -> {[], Src0};
+ true ->
+ Src1 = spill_temp(),
+ {[hipe_x86:mk_fmove(Src0, Src1)], Src1}
+ end
+ end.
+
+is_mem_opnd(#x86_fpreg{reg=Reg}) ->
+ not hipe_amd64_registers:is_precoloured_sse2(Reg);
+is_mem_opnd(#x86_temp{type=double, reg=Reg}) ->
+ not hipe_amd64_registers:is_precoloured_sse2(Reg);
+is_mem_opnd(#x86_temp{type=_, reg=Reg}) ->
+ not hipe_amd64_registers:is_precoloured(Reg);
+is_mem_opnd(#x86_mem{}) -> true.
+
+spill_temp() ->
+ hipe_x86:mk_temp(hipe_amd64_registers:sse2_temp0(), double).