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authorKostis Sagonas <[email protected]>2016-08-26 10:56:39 +0200
committerKostis Sagonas <[email protected]>2016-08-26 10:56:39 +0200
commit015380363c9b17bb88784302a0b672ff758f5569 (patch)
tree4529c84cc7f227ac7de156579cad17256b7c5432 /lib/hipe
parent45276a834883a64eb0115cdcb651f613b8197733 (diff)
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Eliminate catch-all clause from two functions
A stronger version of Dialyzer complained that some case clauses in functions xaluop_is_shift/1 and xaluop_normalise/1 are unreachable. These clauses are now commented out. While at it, I thought that it would be better to eliminate the catch-all clauses in order to be certain we properly handle all RTL instructions that are used as inputs to these functions. Note: The code will now crash if there are unhandled cases.
Diffstat (limited to 'lib/hipe')
-rw-r--r--lib/hipe/sparc/hipe_rtl_to_sparc.erl40
1 files changed, 33 insertions, 7 deletions
diff --git a/lib/hipe/sparc/hipe_rtl_to_sparc.erl b/lib/hipe/sparc/hipe_rtl_to_sparc.erl
index eef5ba8d96..f9c043eafe 100644
--- a/lib/hipe/sparc/hipe_rtl_to_sparc.erl
+++ b/lib/hipe/sparc/hipe_rtl_to_sparc.erl
@@ -750,13 +750,25 @@ xaluop_commutes(XAluOp) ->
xaluop_is_shift(XAluOp) ->
case XAluOp of
+ 'add' -> false;
+ 'addcc' -> false;
+ 'and' -> false;
+ 'andcc' -> false;
+ 'cmpcc' -> false;
+ 'ldsb' -> false;
+ 'ldub' -> false;
+ 'lduw' -> false;
+ 'or' -> false;
'sll' -> true;
- 'srl' -> true;
+ %% 'sllx' -> true;
+ 'smul' -> false;
'sra' -> true;
- 'sllx' -> true;
- 'srlx' -> true;
- 'srax' -> true;
- _ -> false
+ %% 'srax' -> true;
+ 'srl' -> true;
+ %% 'srlx' -> true;
+ 'sub' -> false;
+ 'subcc' -> false;
+ 'xor' -> false
end.
%%% Convert an extended SPARC AluOp back to a plain AluOp.
@@ -764,9 +776,23 @@ xaluop_is_shift(XAluOp) ->
xaluop_normalise(XAluOp) ->
case XAluOp of
- 'cmp' -> 'sub';
+ 'add' -> 'add';
+ 'addcc' -> 'addcc';
+ 'and' -> 'and';
+ 'andcc' -> 'andcc';
+ %% 'cmp' -> 'sub';
'cmpcc' -> 'subcc';
- _ -> XAluOp
+ 'ldsb' -> 'ldsb';
+ 'ldub' -> 'ldub';
+ 'lduw' -> 'lduw';
+ 'or' -> 'or';
+ 'sll' -> 'sll';
+ 'smul' -> 'smul';
+ 'sra' -> 'sra';
+ 'srl' -> 'srl';
+ 'sub' -> 'sub';
+ 'subcc' -> 'subcc';
+ 'xor' -> 'xor'
end.
%%% Convert an RTL condition code.